STM8S105S4数据手册ST中文资料规格书

描述 Description

The STM8S105x4/6 access line 8-bit microcontrollers offer from 16 to 32 Kbyte Flash program memory, plus integrated true data EEPROM. The STM8S microcontroller family reference manual (RM0016) refers to devices in this family as medium-density. All devices of the STM8S105x4/6 access line provide the following benefits: reduced system cost, performance and robustness, short development cycles, and product longevity.

The system cost is reduced thanks to an integrated true data EEPROM for up to 300 k write/erase cycles and a high system integration level with internal clock oscillators, watchdog and brown-out reset.

Device performance is ensured by a 16 MHz CPU clock frequency and enhanced characteristics which include robust I/O, independent watchdogs (with a separate clock source), and a clock security system.

Short development cycles are guaranteed due to application scalability across common family product architecture with compatible pinout, memory map and modular peripherals.

Product longevity is ensured in the STM8S family thanks to their advanced core which is made in a state-of-the-art technology for applications with 2.95 V to 5.5 V operating supply.

Full documentation is offered as well as a wide choice of development tools.

特性 Features

• 内核
•16 MHz advanced STM8 core with Harvard architecture and 3-stage pipeline
•Extended instruction set
• Memories
•Program memory: up to 32 Kbyte Flash; data retention 20 years at 55 °C after 10 kcycle
•Data memory: up to 1 Kbyte true data EEPROM; endurance 300 kcycle
•RAM: up to 2 Kbyte
• Clock, reset and supply management
•2.95 to 5.5 V operating voltage
•Flexible clock control, 4 master clock sources
• Low power crystal resonator oscillator
• External clock input
• Internal, user-trimmable 16 MHz RC
• Internal low-power 128 kHz RC

•Clock security system with clock monitor
•Power management:
• Low-power modes (wait, active-halt, halt)
• Switch-off peripheral clocks individually

•Permanently active, low-consumption power-on and power-down reset
• Interrupt management
•Nested interrupt controller with 32 interrupts
•Up to 37 external interrupts on 6 vectors
• 计时器
•Advanced control timer: 16-bit, 4 CAPCOM channels, 3 complementary outputs, dead-time insertion and flexible synchronization
•2x16-bit general purpose timer, with 2+3 CAPCOM channels (IC, OC or PWM)
•8-bit basic timer with 8-bit prescaler
•Auto wake-up timer
•Window watchdog and independent watchdog timers
• Communication interfaces
•UART with clock output for synchronous operation, SmartCard, IrDA, LIN master mode
•SPI interface up to 8 Mbit/s
•I2C interface up to 400 kbit/s
• Analog to digital converter (ADC)
•10-bit, ±1 LSB ADC with up to 10 multiplexed channels, scan mode and analog watchdog
• I/Os
•Up to 38 I/Os on a 48-pin package including 16 high sink outputs
•Highly robust I/O design, immune against current injection
• Unique ID
•96-bit unique key for each device