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STGAP2HDM中文资料意法半导体数据手册PDF规格书

STGAP2HDM
厂商型号

STGAP2HDM

功能描述

Galvanically isolated 4 A dual gate driver

丝印标识

GAP2HDM

封装外壳

SO-36W

文件大小

803.17 Kbytes

页面数量

24

生产厂商 STMicroelectronics
企业简称

STMICROELECTRONICS意法半导体

中文名称

意法半导体集团官网

原厂标识
数据手册

下载地址一下载地址二到原厂下载

更新时间

2025-6-21 23:00:00

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STGAP2HDM规格书详情

Features

• High voltage rail up to 1200 V

• Driver current capability: 4 A sink/source @ 25 °C

• dV/dt transient immunity ±100 V/ns

• Overall input-output propagation delay: 75 ns

• Separate sink and source option for easy gate driving configuration

• 4 A Miller CLAMP

• UVLO function

• Configurable interlocking function

• Dedicated SD and BRAKE pins

• Gate driving voltage up to 26 V

• 3.3 V, 5 V TTL/CMOS inputs with hysteresis

• Temperature shutdown protection

• Standby function

• 6 kV galvanic isolation

• Wide Body SO-36W

• UL 1577 recognized

Application

• Motor driver for industrial drives, factory automation, home appliances and fans

• 600/1200 V inverters

• Battery chargers

• Induction heating

• Welding

• UPS

• Power supply units

• DC-DC converters

• Power Factor Correction

Description

The STGAP2HD is a dual gate driver which provides galvanic isolation between

each gate driving channel and the low voltage control and interface circuitry. The

gate driver is characterized by 4 A current capability and rail-to-rail outputs, making

it suitable for mid and high power applications such as power conversion and

industrial motor driver inverters. The separated output pins allow to independently

optimize turn-on and turn-off by using dedicated gate resistors, while the Miller

CLAMP function allows avoiding gate spikes during fast commutations in half-bridge

topologies. The device integrates protection functions: dedicated SD and BRAKE

pins are available, UVLO and thermal shutdown are included to easily design high

reliability systems. In half-bridge topologies the interlocking function prevents outputs

from being high at the same time, avoiding shoot-through conditions in case of wrong

logic input commands. The interlocking function can be disabled by a dedicated

configuration pin, so to allow independent and parallel operation of the two channels.

The input to output propagation delay results are contained within 75 ns, providing

high PWM control accuracy. A standby mode is available in order to reduce idle

power consumption.

供应商 型号 品牌 批号 封装 库存 备注 价格
ST(意法半导体)
24+
SSOP32
7350
现货供应,当天可交货!免费送样,原厂技术支持!!!
询价
ST(意法)
24+
NA/
8735
原厂直销,现货供应,账期支持!
询价
ST(意法)
23+
NA
20094
正纳10年以上分销经验原装进口正品做服务做口碑有支持
询价
ST
22+
NA
5000
原装正品支持实单
询价
ST/意法
22+
SOP
9000
原装正品,支持实单!
询价
ST/意法半导体
25+
原厂封装
9999
询价
24+
450
询价
STMicroelectronics
23+/24+
8-SOIC
8600
只供原装进口公司现货+可订货
询价
ST/意法
22+
SOP
15000
原装正品
询价
STMicroelectronics
23+
TO-18
12800
原装正品代理商最优惠价格,现货或订货
询价