STGAP2GSN数据手册ST中文资料规格书

描述 Description

The STGAP2GSN is a single gate driver which provides isolation between the gate driving channel and the low voltage control and interface circuitry.

The gate driver is characterized by 2 A source and 3 A sink capability and rail-to-rail outputs, making the device also suitable for mid and high power applications such as power conversion and motor driver inverters in industrial applications.

The device allows to independently optimize turn-on and turn-off by using dedicated gate resistors.

The device integrates protection functions including thermal shutdown ans UVLO with optimized level for Enhancement-mode GaN FETs, which enables easy design high efficiency and reliable systems. Dual input pins allow the selection of signal polarity control and implementation of HW interlocking protection to avoid cross-conduction in case of controller malfunction.

The input to output propagation delay results contained within 45 ns, providing high PWM control accuracy.

A standby mode is available to reduce idle power consumption.

特性 Features

• High voltage rail up to 1700 V
• Driver current capability: 2 A / 3 A source/sink @25 °C, VH = 6 V
• dV/dt transient immunity ±100 V/ns
• Input-output propagation delay: 45 ns
• Separate sink and source option for easy gate driving configuration
• UVLO function optimized for GaN
• Gate driving voltage up to 15 V
• 3.3 V, 5 V TTL/CMOS inputs with hysteresis
• Temperature shut-down protection
• Standby function
• Narrow body SO-8 package