ST10F276Z5数据手册ST中文资料规格书

描述 Description

The ST10F276Z5 is a derivative of the STMicroelectronics ST10 family of 16-bit single-chip CMOS microcontrollers. It combines high CPU performance (up to 32 million instructions per second) with high peripheral functionality and enhanced I/O-capabilities. It also provides on-chip high-speed single voltage Flash memory, on-chip high-speed RAM, and clock generation via PLL.
The ST10F276Z5 is processed in 0.18 μm CMOS technology. The MCU core and the logic is supplied with a 5 to 1.8 V on-chip voltage regulator. The part is supplied with a single 5 V supply and I/Os work at 5 V.
The device is upward compatible with the ST10F269 device, with some differences.

特性 Features

• Highly performance 16-bit CPU with DSP functions
• 31.25 ns instruction cycle time at 64 MHz max. CPU clock
• Multiply/accumulate unit (MAC) 16 x 16-bit multiplication, 40-bit accumulator
• Enhanced boolean bit manipulations
• Single-cycle context switching support
• On-chip memories
• 512 Kbyte Flash memory (32-bit fetch)
• 320 Kbyte extension Flash memory (16-bit fetch)
• Single voltage Flash memories with erase/program controller and 100 K erasing/programming cycles.
• Up to 16 Mbyte linear address space for code and data (5 Mbytes with CAN or I2C)
• 2 Kbyte internal RAM (IRAM)
• 66 Kbyte extension RAM (XRAM)
• External bus
• Programmable external bus configuration and characteristics for different address ranges
• Five programmable chip-select signals
• Hold-acknowledge bus arbitration support
• Interrupt
• 8-channel peripheral event controller for single cycle interrupt driven data transfer
• 16-priority-level interrupt system with 56 sources, sampling rate down to 15.6ns
• Timers: two multi-functional general purpose timer units with 5 timers
• Two 16-channel capture / compare units
• 4-channel PWM unit + 4-channel XPWM
• A/D converter
• 24-channel 10-bit
• 3 μs minimum conversion time
• Serial channels
• Two synchronous/asynchronous serial channels
• Two high-speed synchronous channels
• One I2C standard interface
• 2 CAN 2.0B interfaces operating on 1 or 2 CAN busses (64 or 2x32 message, C-CAN version)
• Fail-safe protection
• Programmable watchdog timer
• Oscillator watchdog
• On-chip bootstrap loader
• Clock generation
• On-chip PLL with 4 to 12 MHz oscillator
• Direct or prescaled clock input
• Real-time clock and 32 kHz on-chip oscillator
• Up to 111 general purpose I/O lines
• Individually programmable as input, output or special function
• Programmable threshold (hysteresis)
• Idle, Power-down and Standby modes
• Single voltage supply: 5 V ±10% (embedded regulator for 1.8 V core supply)