SPC5777MK0MVU8数据手册恩XP中文资料规格书

描述 Description

The MPC5777M Power Architecture® MCU targets high-end industrial and powertrain applications that meet next-generation advanced engine control, functional safety, and security requirements.
Provides task flexibility and parallel processing by leveraging the I/O processor to offload computational cores
Deters software hacking and aftermarket tuning (which affects unauthorized warranty returns) with next-generation security protection
Comprehensive development tools simplify and accelerate system design

特性 Features

Main Features
• Two independent e200z7 cores operating up to 300 MHz
• Single 300 MHz e200z7 core for delayed lockstep
• Single e200z4 I/O core operating up to 200 MHz
• On-chip DSP and floating point unit (on I/O core)
• Built to support functional safety (ISO 26262 /ASIL-D)
• 248-channel general timer module (GTM104)
• Up to 128-channel eDMA
• Up to 84-channel analog-to-digital converters (ADC)
• Includes 10 x ΣΔ ADC converters
• High-speed Nexus Aurora debug and trace support
• 416-pin PBGA package
• 512-pin PBGA package
• Ultra-Reliable MCUs