SPC5777CDK3MME3中文资料NXP 32-bit MCU, Power Arch cores, 8MB Flash, 264MHz, -40/+125degC, Automotive Grade, 416 MAP数据手册恩XP规格书

描述 Description

The MPC5777C Power Architecture® MCU targets industrial and automotive engine control applications that require advanced performance, timing systems, security, and functional safety capabilities. The family offers a high-performance multicore architecture with industry standard eTPU based timer system. A Flash offering that supports code expansion, a security module, and packaging options are available along with the highest level of functional safety (ASIL-D) support.

特性 Features

• Two independent Power Architecture z7 cores with up to 300 MHz operation
• Single z7 core in Lockstep with one of the main cores
• 8M Flash
• 512kB total SRAM
• 3 eTPU2 timers with 96 channels
• eMIOS timer with 32 channels
• Ethernet 10/100
• Four Sigma Delta and four eQADC converters
• Built to support functional safety (ISO 26262/ASIL-D)
• 416 and 516 BGA
• -40 to 125C Ta Operation

应用 Application

Automotive
•Hybrid and Electric Vehicle Power Inverter