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74HC74

DualDFlip?묯lopwithSetandResetHigh?뭁erformanceSilicon?묰ateCMOS

The74HC74isidenticalinpinouttotheLS74.ThedeviceinputsarecompatiblewithstandardCMOSoutputs;withpullupresistors,theyarecompatiblewithLSTTLoutputs. ThisdeviceconsistsoftwoDflip−flopswithindividualSet,Reset,andClockinputs.InformationataD−inputistransferred

ONSEMION Semiconductor

安森美半导体安森美半导体公司

74HC74

DualD-typeflip-flopwithsetandreset;positive-edgetrigger

GENERALDESCRIPTION The74HC/HCT74arehigh-speedSi-gateCMOSdevicesandarepincompatiblewithlowpowerSchottkyTTL(LSTTL).TheyarespecifiedincompliancewithJEDECstandardno.7A. FEATURES •Outputcapability:standard •ICCcategory:flip-flops

PhilipsROYAL PHILIPS

飞利浦荷兰皇家飞利浦

74HC74

DualD-typeflip-flopwithsetandreset;positiveedge-trigger

1.Generaldescription The74HC74and74HCT74aredualpositiveedgetriggeredD-typeflip-flop.Theyhaveindividual data(nD),clock(nCP),set(nSD)andreset(nRD)inputs,andcomplementarynQandnQoutputs. DataatthenD-input,thatmeetstheset-upandholdtimerequirementsontheLOW-

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

74HC74

HighSpeedCMOSLogic

SS

Silicon Supplies

74HC74

DualD-typeflip-flopwithsetandreset;positiveedge-trigger

PhilipsROYAL PHILIPS

飞利浦荷兰皇家飞利浦

74HC74

HighSpeedCMOSLogic

SS

Silicon Supplies

74HC74

DualD-typeflip-flopwithsetandreset;positiveedge-trigger

Generaldescription The74HC74and74HCT74aredualpositiveedgetriggeredD-typeflip-flop.Theyhaveindividualdata(nD),clock(nCP),set(nSD)andreset(nRD)inputs,andcomplementarynQandnQoutputs.DataatthenD-input,thatmeetstheset-upandholdtimerequirementsontheLOW-to-HI

nxpNXP Semiconductors

恩智浦恩智浦半导体公司

74HC74

DualD-typeflip-flopwithsetandreset;positiveedge-trigger

Generaldescription The74HC74and74HCT74aredualpositiveedgetriggeredD-typeflip-flop.Theyhaveindividualdata(nD),clock(nCP),set(nSD)andreset(nRD)inputs,andcomplementarynQandnQoutputs.DataatthenD-input,thatmeetstheset-upandholdtimerequirementsontheLOW-to-HI

nxpNXP Semiconductors

恩智浦恩智浦半导体公司

74HC74A

DualDFlip-FlopwithSetandReset

ONSEMION Semiconductor

安森美半导体安森美半导体公司

74HC74AF

DualD-TypeFlipFlopPresetandClear

Features •Highspeed:fmax=77MHz(typ.)atVCC=5V •Lowpowerdissipation:ICC=2µA(max)atTa=25°C •Highnoiseimmunity:VNIH=VNIL=28VCC(min) •Outputdrivecapability:10LSTTLloads •Symmetricaloutputimpedance:|IOH|=IOL=4mA(min) •Balancedpropagationdelays:

TOSHIBAToshiba Semiconductor

东芝株式会社東芝

74HC74AP

DualD-TypeFlipFlopPresetandClear

TOSHIBAToshiba Semiconductor

东芝株式会社東芝

74HC74AP

CMOSDigitalIntegratedCircuitSiliconMonolithicDualD-TypeFlipFlopPresetandClear

TOSHIBAToshiba Semiconductor

东芝株式会社東芝

74HC74AP

DUALD-TYPEFLIPFLOPPRESETANDCLEAR

TOSHIBAToshiba Semiconductor

东芝株式会社東芝

74HC74BQ

DualD-typeflip-flopwithsetandreset;positiveedge-trigger

1.Generaldescription The74HC74and74HCT74aredualpositiveedgetriggeredD-typeflip-flop.Theyhaveindividual data(nD),clock(nCP),set(nSD)andreset(nRD)inputs,andcomplementarynQandnQoutputs. DataatthenD-input,thatmeetstheset-upandholdtimerequirementsontheLOW-

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

74HC74BQ

DualD-typeflip-flopwithsetandreset;positive-edgetrigger

GENERALDESCRIPTION The74HC/HCT74arehigh-speedSi-gateCMOSdevicesandarepincompatiblewithlowpowerSchottkyTTL(LSTTL).TheyarespecifiedincompliancewithJEDECstandardno.7A. FEATURES •Outputcapability:standard •ICCcategory:flip-flops

PhilipsROYAL PHILIPS

飞利浦荷兰皇家飞利浦

74HC74BQ

DualD-typeflip-flopwithsetandreset;positiveedge-trigger

Generaldescription The74HC74and74HCT74aredualpositiveedgetriggeredD-typeflip-flop.Theyhaveindividualdata(nD),clock(nCP),set(nSD)andreset(nRD)inputs,andcomplementarynQandnQoutputs.DataatthenD-input,thatmeetstheset-upandholdtimerequirementsontheLOW-to-HI

nxpNXP Semiconductors

恩智浦恩智浦半导体公司

74HC74BQ

DualD-typeflip-flopwithsetandreset;positiveedge-trigger

PhilipsROYAL PHILIPS

飞利浦荷兰皇家飞利浦

74HC74BQ

DualD-typeflip-flopwithsetandreset;positiveedge-trigger

PhilipsROYAL PHILIPS

飞利浦荷兰皇家飞利浦

74HC74BZ

DualD-typeflip-flopwithsetandreset;positiveedge-trigger

1.Generaldescription The74HC74and74HCT74aredualpositiveedgetriggeredD-typeflip-flop.Theyhaveindividual data(nD),clock(nCP),set(nSD)andreset(nRD)inputs,andcomplementarynQandnQoutputs. DataatthenD-input,thatmeetstheset-upandholdtimerequirementsontheLOW-

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

74HC74D

DualD-typeflip-flopwithsetandreset;positiveedge-trigger

PhilipsROYAL PHILIPS

飞利浦荷兰皇家飞利浦

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更多SP74HC74J供应商 更新时间2024-6-19 11:03:00