TRIPLE 3-INPUT POSITIVE-NAND GATES

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TI

德州仪器

TRIPLE 3-INPUT POSITIVE-NAND GATES

文件：935.34 Kbytes 页数：19 Pages

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德州仪器

3 通道、3 输入、4.75V 至 5.25V 双极与非门

These devices contain three independent 3-input NAND gates.\n\n The SN5410, SN54LS10, and SN54S10 are characterized for operation over the full military temperature range of –55°C to 125°C. The SN7410, SN74LS10 and SN74S10 are characterized for operation from 0°C to 70°C. • Package Options Include Plastic \"Small Outline\" Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs\n• Dependable Texas Instruments Quality and Reliability;

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德州仪器

12-BIT SCHOTTKY BARRIER DIODE BUS TERMINATOR

Product Description Reflections on high speed data lines lead to undershoot and overshoot disturbances which may result in improper system operation. Resistor terminations, when used to terminate high speed data lines, increase power consumption and degrade output (high) levels resulting in reduc

文件：172.03 Kbytes 页数：2 Pages

CALMIRCO

12-BIT SCHOTTKY BARRIER DIODE BUS-TERMINATION ARRAY

Designed to Reduce Reflection Noise Repetitive Peak Forward Current to 200 mA 12-Bit Array Structure Suited for Bus-Oriented Systems description/ordering information This Schottky barrier diode bus-termination array is designed to reduce reflection noise on memory bus lines. This device c

文件：731.1 Kbytes 页数：21 Pages

TI

德州仪器

丝印：S1051；Package：SOIC；12-BIT SCHOTTKY BARRIER DIODE BUS-TERMINATION ARRAY

Designed to Reduce Reflection Noise Repetitive Peak Forward Current to 200 mA 12-Bit Array Structure Suited for Bus-Oriented Systems description/ordering information This Schottky barrier diode bus-termination array is designed to reduce reflection noise on memory bus lines. This device c

文件：731.1 Kbytes 页数：21 Pages

TI

德州仪器

丝印：S1051；Package：SOIC；12-BIT SCHOTTKY BARRIER DIODE BUS-TERMINATION ARRAY

Designed to Reduce Reflection Noise Repetitive Peak Forward Current to 200 mA 12-Bit Array Structure Suited for Bus-Oriented Systems description/ordering information This Schottky barrier diode bus-termination array is designed to reduce reflection noise on memory bus lines. This device c

文件：731.1 Kbytes 页数：21 Pages

TI

德州仪器

丝印：S1051；Package：SOIC；12-BIT SCHOTTKY BARRIER DIODE BUS-TERMINATION ARRAY

Designed to Reduce Reflection Noise Repetitive Peak Forward Current to 200 mA 12-Bit Array Structure Suited for Bus-Oriented Systems description/ordering information This Schottky barrier diode bus-termination array is designed to reduce reflection noise on memory bus lines. This device c

文件：731.1 Kbytes 页数：21 Pages

TI

德州仪器

丝印：SN74S1051N；Package：PDIP；12-BIT SCHOTTKY BARRIER DIODE BUS-TERMINATION ARRAY

Designed to Reduce Reflection Noise Repetitive Peak Forward Current to 200 mA 12-Bit Array Structure Suited for Bus-Oriented Systems description/ordering information This Schottky barrier diode bus-termination array is designed to reduce reflection noise on memory bus lines. This device c

文件：731.1 Kbytes 页数：21 Pages

TI

德州仪器

丝印：SN74S1051N；Package：PDIP；12-BIT SCHOTTKY BARRIER DIODE BUS-TERMINATION ARRAY

Designed to Reduce Reflection Noise Repetitive Peak Forward Current to 200 mA 12-Bit Array Structure Suited for Bus-Oriented Systems description/ordering information This Schottky barrier diode bus-termination array is designed to reduce reflection noise on memory bus lines. This device c

文件：731.1 Kbytes 页数：21 Pages

TI

德州仪器