8-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS

文件：1.05557 Mbytes 页数：22 Pages

TI

德州仪器

DUAL POSITIVE-EDGE TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

文件：203.39 Kbytes 页数：7 Pages

UTC

友顺

Dual D-type flip-flop with set and reset; positive-edge trigger

DESCRIPTION The 74LVC74A is a high-performance, low-voltage Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. FEATURES •Wide supply voltage range of 1.2 V to 3.6 V •In accordance with JEDEC standard no. 8-1A. •Inputs accept voltages up to 5.5 V •CMOS low power c

文件：99.08 Kbytes 页数：10 Pages

PHI

PHI

Dual D-type flip-flop with set and reset; positive-edge trigger

1. General description The 74LVC74A is a dual edge triggered D-type flip-flop with individual data (nD) inputs, clock (nCP) inputs, set (nSD) and (nRD) inputs, and complementary nQ and nQ outputs. The set and reset are asynchronous active LOW inputs and operate independently of the clock input

文件：266.16 Kbytes 页数：16 Pages

NEXPERIA

安世