SN74LVC1G38数据手册集成电路（IC）的门反相器规格书PDF

描述 Description

The SN74LVC1G38 device is designed for 1.65-V to 5.5-V VCC operation.

This device is a single two-input NAND buffer gate with open-drain output. It performs the Boolean function Y = A × B or Y = A + B in positive logic.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.

NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

特性 Features

• Latch-up performance exceeds 100 mA Per JESD 78, Class II
• ESD protection exceeds JESD 22
• 2000-V Human-body model (A114-A)
• 200-V Machine model (A115-A)
• 1000-V Charged-device model (C101)

• Available in the Texas Instruments NanoStar™ and NanoFree™ Packages
• Supports 5-V VCC operation
• Inputs accept voltages to 5.5 V
• Supports down translation to VCC
• Maximum tpd of 4.5 ns at 3.3 V
• Low power consumption, 10-µA maximum ICC
• ±24-mA Output drive at 3.3 V
• Ioff Supports partial-power-down mode and back-drive protection