SN74LVC1G175-EP中文资料具有异步清零功能的增强型产品单路 D 型触发器数据手册TI规格书

描述 Description

This single D-type flip-flop is designed for 1.65-V to 5.5-V VCC operation. The SN74LVC1G175 has an asynchronous clear (CLR) input. When CLR is high, data from the input pin (D) is transferred to the output pin (Q) on the clock’s (CLK) rising edge. When CLR is low, Q is forced into the low state, regardless of the clock edge or data on D.This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

特性 Features

• Supports 5-V VCC Operation
• Max tpd of 4.3 ns at 3.3 V
• ±24-mA Output Drive at 3.3 V
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• 2000-V Human-Body Model (A114-A)
• 1000-V Charged-Device Model (C101)
• APPLICATIONS
• One Assembly/Test Site
• Available in Military (–55°C/125°C) Temperature Range
• Extended Product-Change Notification
• Product Traceability


Additional temperature ranges available - contact factory