SN74LV595A数据手册集成电路（IC）的移位寄存器规格书PDF

描述 Description

The SN74LV595A device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Both the shift register clock (SRCLK) and storage register clock (RCLK) are positive-edge triggered.

特性 Features

• 2-V to 5.5-V VCC Operation
• Max tpd of 7.1 ns at 5 V
• Typical VOLP (Output Ground Bounce) CC = 3.3 V, TA = 25°C
• Typical VOHV (Output VOH Undershoot) > 2.3 V at VCC = 3.3 V, TA = 25°C
• Support Mixed-Mode Voltage Operation on All Ports
• 8-Bit Serial-In, Parallel-Out Shift
• Ioff Supports Live Insertion, Partial Power-Down Mode, and Back-Drive Protection
• Shift Register Has Direct Clear
• Latch-Up Performance Exceeds 250 mA Per JESD 17
• ESD Protection Exceeds JESD 22
• 2000-V Human-Body Model
• 200-V Machine Model
• 1000-V Charged-Device Model