DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP TheSN54LS/74LS73A offers individual J, K, clear, and clock inputs.These dualflip-flops aredesigned so that when the clock goes HIGH, the inputs are enabledand data will be accepted. The logic level of the J and K inputs may beallowed to change when the

文件：73.83 Kbytes 页数：3 Pages

MOTOROLA

摩托罗拉

DUAL J-K FLIP-FLOPS WITH CLEAR

Package Options Include Plastic ‘*Small Outline’” Packages, Flat Packages, and Plastic and Ceramic DIPs Dependable Texas Instruments Quality and Reliability description The ‘73, and 'H73, contain two independent JK flip-flops with individual J-K, clock, and direct clear inputs. The ‘

文件：810.42 Kbytes 页数：20 Pages

TI

德州仪器

丝印：LS73A；Package：SOIC；DUAL J-K FLIP-FLOPS WITH CLEAR

Package Options Include Plastic ‘*Small Outline’” Packages, Flat Packages, and Plastic and Ceramic DIPs Dependable Texas Instruments Quality and Reliability description The ‘73, and 'H73, contain two independent JK flip-flops with individual J-K, clock, and direct clear inputs. The ‘

文件：810.42 Kbytes 页数：20 Pages

TI

德州仪器

丝印：LS73A；Package：SOIC；DUAL J-K FLIP-FLOPS WITH CLEAR

Package Options Include Plastic ‘*Small Outline’” Packages, Flat Packages, and Plastic and Ceramic DIPs Dependable Texas Instruments Quality and Reliability description The ‘73, and 'H73, contain two independent JK flip-flops with individual J-K, clock, and direct clear inputs. The ‘

文件：810.42 Kbytes 页数：20 Pages

TI

德州仪器

丝印：LS73A；Package：SOIC；DUAL J-K FLIP-FLOPS WITH CLEAR

Package Options Include Plastic ‘*Small Outline’” Packages, Flat Packages, and Plastic and Ceramic DIPs Dependable Texas Instruments Quality and Reliability description The ‘73, and 'H73, contain two independent JK flip-flops with individual J-K, clock, and direct clear inputs. The ‘

文件：810.42 Kbytes 页数：20 Pages

TI

德州仪器

丝印：SN74LS73AN；Package：PDIP；DUAL J-K FLIP-FLOPS WITH CLEAR

Package Options Include Plastic ‘*Small Outline’” Packages, Flat Packages, and Plastic and Ceramic DIPs Dependable Texas Instruments Quality and Reliability description The ‘73, and 'H73, contain two independent JK flip-flops with individual J-K, clock, and direct clear inputs. The ‘

文件：810.42 Kbytes 页数：20 Pages

TI

德州仪器

丝印：SN74LS73AN；Package：PDIP；DUAL J-K FLIP-FLOPS WITH CLEAR

Package Options Include Plastic ‘*Small Outline’” Packages, Flat Packages, and Plastic and Ceramic DIPs Dependable Texas Instruments Quality and Reliability description The ‘73, and 'H73, contain two independent JK flip-flops with individual J-K, clock, and direct clear inputs. The ‘

文件：810.42 Kbytes 页数：20 Pages

TI

德州仪器

丝印：SN74LS73AN；Package：PDIP；DUAL J-K FLIP-FLOPS WITH CLEAR

Package Options Include Plastic ‘*Small Outline’” Packages, Flat Packages, and Plastic and Ceramic DIPs Dependable Texas Instruments Quality and Reliability description The ‘73, and 'H73, contain two independent JK flip-flops with individual J-K, clock, and direct clear inputs. The ‘

文件：810.42 Kbytes 页数：20 Pages

TI

德州仪器

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP TheSN54LS/74LS73A offers individual J, K, clear, and clock inputs.These dualflip-flops aredesigned so that when the clock goes HIGH, the inputs are enabledand data will be accepted. The logic level of the J and K inputs may beallowed to change when the

文件：73.83 Kbytes 页数：3 Pages

MOTOROLA

摩托罗拉

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP TheSN54LS/74LS73A offers individual J, K, clear, and clock inputs.These dualflip-flops aredesigned so that when the clock goes HIGH, the inputs are enabledand data will be accepted. The logic level of the J and K inputs may beallowed to change when the

文件：73.83 Kbytes 页数：3 Pages

MOTOROLA

摩托罗拉