SN74AVC16T245-Q1中文资料具有可配置电压转换的汽车类 16 位双电源总线收发器数据手册TI规格书

描述 Description

The SN74AVC16T245-Q1 is a 16-bit noninverting bus transceiver that uses two separate configurable power-supply rails. The SN74AVC16T245-Q1 is optimized to operate with VCCA or VCCB set at 1.4 V to 3.6 V. It is operational with VCCA or VCCB as low as 1.2 V. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.
The SN74AVC16T245-Q1 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses effectively are isolated.
The SN74AVC16T245-Q1 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by VCCA.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
The VCC isolation feature ensures that if either VCC input is at GND, both ports are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE must be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

特性 Features

• Qualified for Automotive Applications
• Device HBM ESD Classification Level H3B (JESD 22 A114-A)
• Control Inputs VIH/VIL Levels Are Referenced to VCCA Voltage
• Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.2-V to 3.6-VPower-Supply Range
• I/Os Are 4.6-V Tolerant
• 200 Mbps (
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II