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SN74ALVCH16901中文资料具有奇偶校验发生器/校验器的 18 位通用总线收发器数据手册TI规格书

厂商型号 |
SN74ALVCH16901 |
参数属性 | SN74ALVCH16901 封装/外壳为64-TFSOP(0.240",6.10mm 宽);包装为管件;类别为集成电路(IC)的通用总线功能;产品描述:IC UNIV BUS TXRX 18BIT 64TSSOP |
功能描述 | 具有奇偶校验发生器/校验器的 18 位通用总线收发器 |
封装外壳 | 64-TFSOP(0.240",6.10mm 宽) |
制造商 | TI Texas Instruments |
中文名称 | 德州仪器 美国德州仪器公司 |
数据手册 | |
更新时间 | 2025-9-26 10:12:00 |
人工找货 | SN74ALVCH16901价格和库存,欢迎联系客服免费人工找货 |
SN74ALVCH16901规格书详情
描述 Description
This 18-bit (dual-octal) noninverting registered transceiver is designed for 1.65-V to 3.6-V VCC operation.
The SN74ALVCH16901 is a dual 9-bit to dual 9-bit parity transceiver with registers. The device can operate as a feed-through transceiver or it can generate/check parity from the two 8-bit data buses in either direction.
The SN74ALVCH16901 features independent clock (CLKAB or CLKBA), latch-enable (LEAB or LEBA), and dual 9-bit clock-enable (CLKENAB\\ or CLKENBA\\) inputs. It also provides parity-enable (SEL\\) and parity-select (ODD/EVEN\\) inputs and separate error-signal (ERRA\\ or ERRB\\) outputs for checking parity. The direction of data flow is controlled by OEAB\\ and OEBA\\. When SEL\\ is low, the parity functions are enabled. When SEL\\ is high, the parity functions are disabled and the device acts as an 18-bit registered transceiver.
To ensure the high-impedance state during power up or power down, OE\\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The A and B I/Os and APAR and BPAR inputs have bus-hold circuitry. Active bus-hold circuitry holds unused or undriven data inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
特性 Features
• Member of the Texas Instruments Widebus+ Family
• UBT Transceiver Combines D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, or Clocked Mode
• Operates From 1.65 V to 3.6 V
• Max tpd of 4.4 ns at 3.3 V
• ±24-mA Output Drive at 3.3 V
• Simultaneously Generates and Checks Parity
• Option to Select Generate Parity and Check or Feed-Through Data/Parity in A-to-B or B-to-A Directions
• Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
• Latch-Up Performance Exceeds 250 mA Per JESD 17
• ESD Protection Exceeds JESD 22
• 2000-V Human-Body Model (A114-A)
• 200-V Machine Model (A115-A)Widebus+ and UBT are trademarks of Texas Instruments Incorporated.
技术参数
- 制造商编号
:SN74ALVCH16901
- 生产厂家
:TI
- VCC(Min)(V)
:1.65
- VCC(Max)(V)
:3.6
- Channels(#)
:18
- IOL(Max)(mA)
:24
- IOH(Max)(mA)
:-24
- ICC(uA)
:40
- Input type
:Standard CMOS
- Output type
:3-State
- Features
:Balanced OutputsUltra high speed (tpd Positive input clamp diodeBus-hold
- Rating
:Catalog
- Operating temperature range(C)
:-40 to 85
- Package Group
:TSSOP | 64
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
TI |
2025+ |
TSSOP-64 |
16000 |
原装优势绝对有货 |
询价 | ||
TI |
23+ |
SSMD |
3200 |
公司只做原装,可来电咨询 |
询价 | ||
24+ |
N/A |
69000 |
一级代理-主营优势-实惠价格-不悔选择 |
询价 | |||
TI |
23+ |
SSMD |
3200 |
正规渠道,只有原装! |
询价 | ||
Texas Instruments |
24+ |
64-TSSOP |
65300 |
一级代理/放心采购 |
询价 | ||
TI/德州仪器 |
24+ |
NA/ |
4152 |
原厂直销,现货供应,账期支持! |
询价 | ||
TI德州仪器 |
22+ |
24000 |
原装正品现货,实单可谈,量大价优 |
询价 | |||
TI |
23+ |
TSSOP64 |
8650 |
受权代理!全新原装现货特价热卖! |
询价 | ||
TI |
23+ |
TSSOP64 |
1200 |
绝对全新原装!优势供货渠道!特价!请放心订购! |
询价 | ||
TI/德州仪器 |
23+ |
TSSOP |
50000 |
全新原装正品现货,支持订货 |
询价 |