SN74ALVCH16832数据手册集成电路（IC）的缓冲器驱动器接收器收发器规格书PDF

描述 Description

This 1-bit to 4-bit address register/driver is designed for 1.65-V to 3.6-V VCC operation. This device is ideal for use in applications in which a single address bus is driving four separate memory locations. The SN74ALVCH16832 can be used as a buffer or a register, depending on the logic level of the select (SEL)\\ input.
When SEL\\ is a logic high, the device is in the buffer mode. The outputs follow the inputs and are controlled by the two output-enable (OE)\\ inputs. Each OE\\ controls two groups of seven outputs.
When SEL\\ is a logic low, the device is in the register mode. The register is an edge-triggered D-type flip-flop. On the positive transition of the clock (CLK) input, data at the A inputs is stored in the internal registers. OE\\ operates the same as in the buffer mode.
When OE\\ is a logic low, the outputs are in a normal logic state (high or low logic level). When OE\\ is a logic high, the outputs are in the high-impedance state.
Neither SEL\\ nor OE\\ affect the internal operation of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE\\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

特性 Features

·Member of the Texas Instruments Widebus™ Family
·Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
·Latch-Up Performance Exceeds 250 mA Per JESD 17
·ESD Protection Exceeds JESD 22 ·2000-V Human-Body Model (A114-A)
·200-V Machine Model (A115-A)
·1000-V Charged-Device Model (C101)

Widebus is a trademark of Texas Instruments.