SN74AHCT165-Q1中文资料德州仪器数据手册PDF规格书

1 Features

• AEC-Q100 qualified for automotive applications:

– Device temperature grade 1: -40°C to +125°C

– Device HBM ESD classification level 2

– Device CDM ESD classification level C4B

• Available in wettable flank QFN (WBQA) package

• Operating range 4.5-V to 5.5-V VCC

• TTL-Compatible inputs

• Low delay, 7 ns (25 °C, 5 V)

• Latch-up performance exceeds 250 mA

per JESD 17

2 Applications

• Network Switches

• Power Infrastructures

• LED Displays

• Servers

3 Description

The SN74AHCT165-Q1 device contains an 8-bit

serial-in, parallel-out shift register that feeds an 8-

bit D-type storage register. The storage register has

parallel 3-state outputs. Separate clocks are provided

for both the shift and storage registers. The shift

register has a direct overriding clear (SRCLR) input,

a serial (SER) input, and a serial output for cascading.

When the output-enable (OE) input is high, all outputs

except QH′ are in the high-impedance state.