SN74AHC240数据手册集成电路（IC）的缓冲器驱动器接收器收发器规格书PDF

描述 Description

These octal buffers/drivers are designed specifically to improve the performance and density of 3-state memory-address drivers, clock drivers, and bus-oriented receivers and transmitters.

The ’AHC240 devices are organized as two 4-bit buffers/line drivers with separate output-enable (OE)\\ inputs. When OE\\ is low, the device passes data from the A inputs to the Y outputs. When OE\\ is high, the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE\\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

特性 Features

• Operating Range 2-V to 5.5-V VCC
• Latch-Up Performance Exceeds 250 mA Per JESD 17