12-BIT LINE/MEMORY DRIVERS WITH 3-STATE OUTPUTS

文件：530.1 Kbytes 页数：12 Pages

TI

德州仪器

具有 TTL 兼容型 CMOS 输入和三态输出的 12 通道、4.5V 至 5.5V 缓冲器

These 12-bit buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-en • Output Ports Have Equivalent 25- Series Resistors, So No External Resistors Are Required\n• State-of-the-Art EPIC-II BTM BiCMOS Design Significantly Reduces Power Dissipation\n• Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 \n• Typical VOLP (Output Ground Bounce) CC = 5 V, TA = 25;

TI

德州仪器

Package：28-SOIC（0.295"，7.50mm 宽）；包装：管件 类别：集成电路（IC） 缓冲器，驱动器，接收器，收发器 描述：IC BUF NON-INVERT 5.5V 28SOIC

TI2

德州仪器

Package：28-SOIC（0.295"，7.50mm 宽）；包装：卷带（TR） 类别：集成电路（IC） 缓冲器，驱动器，接收器，收发器 描述：IC BUF NON-INVERT 5.5V 28SOIC

TI2

德州仪器