DUAL 8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS

Members of the Texas Instruments WidebusE Family State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce)

文件：287.21 Kbytes 页数：14 Pages

TI

德州仪器

DUAL 8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS

文件：169.02 Kbytes 页数：10 Pages

TI

德州仪器

DUAL 8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS

文件：171.15 Kbytes 页数：10 Pages

TI

德州仪器

DUAL 8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS

文件：364.02 Kbytes 页数：13 Pages

TI

德州仪器

双路 8 位至 9 位奇偶校验总线收发器

The 'ABT16833 consist of two noninverting 8-bit to 9-bit parity bus transceivers and are designed for communication between data buses. For each transceiver, when data is transmitted from the A bus to the B bus, an odd-parity bit is generated and output on the parity I/O pin (1PARITY or 2PARITY). Wh • Members of the Texas Instruments WidebusTM Family• State-of-the-Art EPIC-IIBTM BiCMOS DesignSignificantly Reduces Power Dissipation• Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17• Typical VOLP (Output Ground Bounce) CC = 5 V, TA = 25°C• Distributed VCC and GND Pin Configuration Mi;

TI

德州仪器

丝印：ABT16833；Package：SSOP；DUAL 8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS

Members of the Texas Instruments WidebusE Family State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce)

文件：287.21 Kbytes 页数：14 Pages

TI

德州仪器

丝印：ABT16833；Package：SSOP；DUAL 8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS

Members of the Texas Instruments WidebusE Family State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce)

文件：287.21 Kbytes 页数：14 Pages

TI

德州仪器

丝印：ABT16833；Package：SSOP；DUAL 8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS

Members of the Texas Instruments WidebusE Family State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce)

文件：287.21 Kbytes 页数：14 Pages

TI

德州仪器

丝印：ABT16833；Package：SSOP；DUAL 8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS

Members of the Texas Instruments WidebusE Family State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce)

文件：287.21 Kbytes 页数：14 Pages

TI

德州仪器

DUAL 8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS

文件：169.02 Kbytes 页数：10 Pages

TI

德州仪器