LVDS SERDES TRANSMITTER

1FEATURES • 3:21 Data Channel Compression at up to 1.428 Gigabits/s Throughput • Suited for Point-to-Point Subsystem Communication With Very Low EMI • 21 Data Channels Plus Clock in Low-Voltage TTL and 3 Data Channels Plus Clock Out Low-Voltage Differential • Operates From a Single 3.3-V S

文件：445.27 Kbytes 页数：22 Pages

TI

德州仪器

LVDS SERDES TRANSMITTER

Qualified for Automotive Applications 21:3 Data Channel Compression at up to 1.36 Gigabits per Second Throughput Suited for Point-to-Point Subsystem Communication With Very Low EMI 21 Data Channels Plus Clock in Low-Voltage TTL and 3 Data Channels Plus Clock Out Low-Voltage Differential Op

文件：462.36 Kbytes 页数：18 Pages

TI

德州仪器

LVDS SERDES TRANSMITTER

文件：177.85 Kbytes 页数：13 Pages

TI

德州仪器

LVDS SERDES TRANSMITTER

文件：454.87 Kbytes 页数：18 Pages

TI

德州仪器

丝印：SN65LVDS95；Package：TSSOP；LVDS SERDES TRANSMITTER

1FEATURES • 3:21 Data Channel Compression at up to 1.428 Gigabits/s Throughput • Suited for Point-to-Point Subsystem Communication With Very Low EMI • 21 Data Channels Plus Clock in Low-Voltage TTL and 3 Data Channels Plus Clock Out Low-Voltage Differential • Operates From a Single 3.3-V S

文件：445.27 Kbytes 页数：22 Pages

TI

德州仪器

丝印：SN65LVDS95；Package：TSSOP；LVDS SERDES TRANSMITTER

1FEATURES • 3:21 Data Channel Compression at up to 1.428 Gigabits/s Throughput • Suited for Point-to-Point Subsystem Communication With Very Low EMI • 21 Data Channels Plus Clock in Low-Voltage TTL and 3 Data Channels Plus Clock Out Low-Voltage Differential • Operates From a Single 3.3-V S

文件：445.27 Kbytes 页数：22 Pages

TI

德州仪器

丝印：SN65LVDS95；Package：TSSOP；LVDS SERDES TRANSMITTER

1FEATURES • 3:21 Data Channel Compression at up to 1.428 Gigabits/s Throughput • Suited for Point-to-Point Subsystem Communication With Very Low EMI • 21 Data Channels Plus Clock in Low-Voltage TTL and 3 Data Channels Plus Clock Out Low-Voltage Differential • Operates From a Single 3.3-V S

文件：445.27 Kbytes 页数：22 Pages

TI

德州仪器

丝印：SN65LVDS95；Package：TSSOP；LVDS SERDES TRANSMITTER

1FEATURES • 3:21 Data Channel Compression at up to 1.428 Gigabits/s Throughput • Suited for Point-to-Point Subsystem Communication With Very Low EMI • 21 Data Channels Plus Clock in Low-Voltage TTL and 3 Data Channels Plus Clock Out Low-Voltage Differential • Operates From a Single 3.3-V S

文件：445.27 Kbytes 页数：22 Pages

TI

德州仪器

丝印：SN65LVDS95；Package：TSSOP；LVDS SERDES TRANSMITTER

1FEATURES • 3:21 Data Channel Compression at up to 1.428 Gigabits/s Throughput • Suited for Point-to-Point Subsystem Communication With Very Low EMI • 21 Data Channels Plus Clock in Low-Voltage TTL and 3 Data Channels Plus Clock Out Low-Voltage Differential • Operates From a Single 3.3-V S

文件：445.27 Kbytes 页数：22 Pages

TI

德州仪器

Serdes 串行器

The SN65LVDS95 LVDS serdes (serializer/deserializer) transmitter contains three 7-bit parallel-load serial-out shift registers, a 7× clock synthesizer, and four low-voltage differential signaling (LVDS) line drivers in a single integrated circuit. These functions allow 21 bits of single-ended LVTTL • 3:21 Data Channel Compression at up to 1.428 Gigabits/s Throughput\n• Suited for Point-to-Point Subsystem Communication With Very Low EMI\n• 21 Data Channels Plus Clock in Low-Voltage TTL and 3 Data Channels Plus Clock Out Low-Voltage Differential\n• Operates From a Single 3.3-V Supply and 250 mW ;

TI

德州仪器