丝印：SN65LVDS93；Package：TSSOP；LVDS SERDES TRANSMITTER

1FEATURES · 28:4 Data Channel Compression at up to 1.904 Gigabits per Second Throughput · Suited for Point-to-Point Subsystem Communication With Very Low EMI · 28 Data Channels Plus Clock in Low-Voltage TTL and 4 Data Channels Plus Clock Out Low-Voltage Differential · Selectable Rising or

文件：616.67 Kbytes 页数：20 Pages

TI

德州仪器

丝印：SN65LVDS93；Package：TSSOP；LVDS SERDES TRANSMITTER

1FEATURES · 28:4 Data Channel Compression at up to 1.904 Gigabits per Second Throughput · Suited for Point-to-Point Subsystem Communication With Very Low EMI · 28 Data Channels Plus Clock in Low-Voltage TTL and 4 Data Channels Plus Clock Out Low-Voltage Differential · Selectable Rising or

文件：616.67 Kbytes 页数：20 Pages

TI

德州仪器

丝印：SN65LVDS93；Package：TSSOP(DGG)；LVDS SERDES TRANSMITTER

1FEATURES · 28:4 Data Channel Compression at up to 1.904 Gigabits per Second Throughput · Suited for Point-to-Point Subsystem Communication With Very Low EMI · 28 Data Channels Plus Clock in Low-Voltage TTL and 4 Data Channels Plus Clock Out Low-Voltage Differential · Selectable Rising or

文件：617.08 Kbytes 页数：20 Pages

TI

德州仪器

丝印：SN65LVDS93；Package：TSSOP(DGG)；LVDS SERDES TRANSMITTER

1FEATURES · 28:4 Data Channel Compression at up to 1.904 Gigabits per Second Throughput · Suited for Point-to-Point Subsystem Communication With Very Low EMI · 28 Data Channels Plus Clock in Low-Voltage TTL and 4 Data Channels Plus Clock Out Low-Voltage Differential · Selectable Rising or

文件：617.08 Kbytes 页数：20 Pages

TI

德州仪器

丝印：SN65LVDS93；Package：TSSOP(DGG)；LVDS SERDES TRANSMITTER

1FEATURES · 28:4 Data Channel Compression at up to 1.904 Gigabits per Second Throughput · Suited for Point-to-Point Subsystem Communication With Very Low EMI · 28 Data Channels Plus Clock in Low-Voltage TTL and 4 Data Channels Plus Clock Out Low-Voltage Differential · Selectable Rising or

文件：617.08 Kbytes 页数：20 Pages

TI

德州仪器

丝印：SN65LVDS93；Package：TSSOP；LVDS SERDES TRANSMITTER

1FEATURES · 28:4 Data Channel Compression at up to 1.904 Gigabits per Second Throughput · Suited for Point-to-Point Subsystem Communication With Very Low EMI · 28 Data Channels Plus Clock in Low-Voltage TTL and 4 Data Channels Plus Clock Out Low-Voltage Differential · Selectable Rising or

文件：616.67 Kbytes 页数：20 Pages

TI

德州仪器

20MHz 至 68MHz LVDS 串行器/解串器变送器

The SN65LVDS93 LVDS serdes (serializer/ deserializer) transmitter contains four 7-bit parallel- load serial-out shift registers, a 7× clock synthesizer, and five low-voltage differential signaling (LVDS) drivers in a single integrated circuit. These functions allow 28 bits of single-ended LVTTL data • 28:4 Data Channel Compression at up to 1.904 Gigabits per Second Throughput\n• Suited for Point-to-Point Subsystem Communication With Very Low EMI\n• 28 Data Channels Plus Clock in Low-Voltage TTL and 4 Data Channels Plus Clock Out Low-Voltage Differential\n• Selectable Rising or Falling Clock Edg;

TI

德州仪器

LVDS SERDES TRANSMITTER

1FEATURES · 28:4 Data Channel Compression at up to 1.904 Gigabits per Second Throughput · Suited for Point-to-Point Subsystem Communication With Very Low EMI · 28 Data Channels Plus Clock in Low-Voltage TTL and 4 Data Channels Plus Clock Out Low-Voltage Differential · Selectable Rising or

文件：617.08 Kbytes 页数：20 Pages

TI

德州仪器

SN65LVDS93A FlatLink™ Transmitter

1 Features 1• Industrial Temperature Range –40°C to 85°C • LVDS Display Serdes Interfaces Directly to LCD Display Panels With Integrated LVDS • Package Options: 4.5-mm × 7-mm BGA, and 8.1- mm × 14-mm TSSOP • 1.8 V up to 3.3-V Tolerant Data Inputs to Connect Directly to Low-Power, Low-Voltag

文件：1.42341 Mbytes 页数：40 Pages

TI

德州仪器

SN65LVDS93A FlatLink™ Transmitter

1 Features 1• Industrial Temperature Range –40°C to 85°C • LVDS Display Serdes Interfaces Directly to LCD Display Panels With Integrated LVDS • Package Options: 4.5-mm × 7-mm BGA, and 8.1- mm × 14-mm TSSOP • 1.8 V up to 3.3-V Tolerant Data Inputs to Connect Directly to Low-Power, Low-Voltag

文件：1.42341 Mbytes 页数：40 Pages

TI

德州仪器