SN54LS253数据手册TI中文资料规格书

描述 Description

Each of these Schottky-clamped data selectors/multiplexers contains inverters and drivers to supply fully complementary, on-chip, binary decoding data selection to the AND-OR gates. Separate output control inputs are provided for each of the two four-line sections. The three-state outputs can interface with and drive data lines of bus-organized systems. With all but one of the common outputs disabled (at a high-impedance state) the low-impedance of the single enabled output will drive the bus line to a high or low logic level.  

特性 Features

• Three-State Version of SN54/74LS153, SN54/74S153
• Schottky-Diode-Clamped Transistors
• Permits Multiplexing from N Lines to 1 Line
• Performs Parallel-to Serial Conversion
• Fully Compatible with Most TTL Circuits
• Low Power Dissipation
• 'LS253 … 35 mW Typical
• 'S253 … 225 mW Typical