SN54LS240-SP数据手册TI中文资料规格书

描述 Description

The SNx4LS24x, SNx4S24x octal buffers and line drivers are designed specifically to improve both the performance and density of three-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The designer has a choice of selected combinations of inverting and non-inverting outputs, symmetrical, active-low output-control (G) inputs, and complementary output-control (G and G) inputs. These devices feature high fan-out, improved fan-in, and 400-mV noise margin. The SN74LS24x and SN74S24x devices can be used to drive terminated lines down to 133 Ω.

特性 Features

• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs
• Maximum tpd of 15 ns at 5 V
• 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers
• PNP Inputs Reduce DC Loading
• Hysteresis at Inputs Improves Noise Margins