DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK

文件：240.11 Kbytes 页数：8 Pages

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德州仪器

TRIPLE 3-INPUT POSITIVE-AND GATES

文件：179.08 Kbytes 页数：7 Pages

TI

德州仪器

TRIPLE 3-INPUT POSITIVE-AND GATES

文件：153.88 Kbytes 页数：5 Pages

TI

德州仪器

TRIPLE 3-INPUT POSITIVE-AND GATES

文件：1.096 Mbytes 页数：17 Pages

TI

德州仪器

TRIPLE 3-INPUT POSITIVE-AND GATES

文件：179.08 Kbytes 页数：7 Pages

TI

德州仪器

TRIPLE 3-INPUT POSITIVE-AND GATES

文件：153.88 Kbytes 页数：5 Pages

TI

德州仪器

TRIPLE 3-INPUT POSITIVE-AND GATES

文件：153.88 Kbytes 页数：5 Pages

TI

德州仪器

TRIPLE 3-INPUT POSITIVE-AND GATES

文件：179.08 Kbytes 页数：7 Pages

TI

德州仪器

具有预置和清零端的双路负边沿触发式 J-K 触发器

These devices contain two independent J-K negative-edge-triggered flip-flops. A low level at the preset and clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the J and K inputs meeting the setup time requirements • Fully Buffered to Offer Maximum Isolation from External Disturbance\n• Package Options Include Plastic “Small Outline\" Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs\n• Dependable Texas Instruments Quality and Reliability;

TI

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET

TI

德州仪器