SN54HC373-SP数据手册TI中文资料规格书

描述 Description

These 8-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The eight latches of the ’HC373 devices are transparent D-type latches. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels that were set up at the D inputs.

An output-enable (OE)\\ input places the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.

OE\\ does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are off.

特性 Features

• Wide Operating Voltage Range of 2 V to 6 V
• High-Current 3-State True Outputs Can Drive Up To 15 LSTTL Loads
• Low Power Consumption, 80-µA Max ICC
• Typical tpd = 13 ns
• ±6-mA Output Drive at 5 V
• Low Input Current of 1 µA Max
• Eight High-Current Latches in a Single Package
• Full Parallel Access for Loading