SN54ABTH32245

36-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

MembersoftheTexasInstruments Widebus+EFamily State-of-the-ArtEPIC-IIBEBiCMOSDesign SignificantlyReducesPowerDissipation Latch-UpPerformanceExceeds500mAPer JEDECStandardJESD-17 TypicalVOLP(OutputGroundBounce)

SN54ABTH32245

36-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

MembersoftheTexasInstruments Widebus+EFamily State-of-the-ArtEPIC-IIBEBiCMOSDesign SignificantlyReducesPowerDissipation Latch-UpPerformanceExceeds500mAPer JEDECStandardJESD-17 TypicalVOLP(OutputGroundBounce)

SN54ABTH32245

具有三态输出的 36 位总线收发器; • Members of the Texas InstrumentsWidebus+TM Family• State-of-the-ArtEPIC-II BTM BiCMOS Design Significantly Reduces Power Dissipation• Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17• Typical VOLP (Output Ground Bounce) CC = 5 V, TA = 25°C• High-Impedance State During Power Up and Power Down• Released as DSCC SMD 5962-9557701NXD• PZ Package Qualified for Military Per MIL-PRF-38535 (QML)• Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise• High-Drive Outputs (-32-mA IOH, 64-mA IOL)• Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors• Package Options Include 100-Pin Plastic Thin Quad Flat (PZ) Package With 14 × 14-mm Body Using 0.5-mm Lead Pitch and Space-Saving 100-Pin Ceramic Quad Flat (HS) Package Widebus+ and EPIC-IIB are trademarks of Texas Instruments Incorporated. The HS package is not production released.;

The 'ABTH32245 are 36-bit (quad 9-bit) noninverting 3-state transceivers designed for synchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements. These devices can be used as four 9-bit transceivers, two18-bit transceivers, or one 36-bit transceiver. They allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) inputs. The output-enable (OE\\) inputs can be used to disable the device so that the buses are effectively isolated. When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V, OE\\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry holds unused or floating data inputs at a valid logic level.The SN54ABTH32245 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABTH32245 is characterized for operation from -40°C to 85°C. \n

SN54ABTH32245

36-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

SN54ABTH32245

36-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

SN54ABTH32245_07

36-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

SN54ABTH32245PZ

36-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS