SM320C80中文资料军用级 C80x 定点 DSP数据手册TI规格书

描述 Description

The SMJ320C80 is a single-chip, MIMD parallel processor capable of performing over two billion operations per second. It consists of a 32-bit RISC master processor with a 100-MFLOPS (million floating-point operations per second) IEEE floating-point unit, four 32-bit parallel processing digital signal processors (DSPs), a transfer controller with up to 400-MBps off-chip transfer rate, and a video controller. All the processors are coupled tightly through an on-chip crossbar that provides shared access to on-chip RAM. This performance and programmability make the ’C80 ideally suited for video, imaging, and high-speed telecommunications applications.

特性 Features

• Single-Chip Parallel Multiple Instruction/Multiple Data (MIMD) Digital Signal Processor (DSP)
• Master Processor (MP)
• IEEE-754 Floating-Point Capability
• 4K-Byte Data Cache
• Four Parallel Processors (PP)
• 64-Bit Opcode Provides Many Parallel Operations per Cycle
• Transfer Controller (TC)
• Up to 400 Megabytes per Second (MBps) Transfer Rate
• Direct DRAM/VRAM Interface With Dynamic Bus Sizing
• Video Controller (VC)
• Dual-Frame Timers for Two Simultaneous Image-Capture and/or Display Systems
• Big- or Little-Endian Operation
• 4G-Byte Address Space
• 3.3-V Operation
• Operating Temperature Range    –55°C to 125°C - M-Temperature    –40°C to 85°C - A-Temperature
IEEE Standard 1149.1–1990, IEEE Standard Test Access Port and Boundary-Scan Architecture