SLG47003中文资料瑞萨数据手册PDF规格书

特性 Features

■ Two Operational Amplifiers (OpAmp) with

Ultra-low Power Consumption

● Rail-to-Rail Input and Output (RRIO)

● Ultra-low Offset Voltage

● Zero Offset Voltage Drift

■ Integrated Voltage Reference (VREF)

■ Multi-channel Sampling Analog Comparator

(MS-ACMP)

● Sampling up to Six Analog Channels

● Selectable Voltage Reference for Each Channel

● Different Sampling Scenarios

● Synchronous or Asynchronous Result

Appearance

● Range Comparator Mode

■ Two 1024-Position 100 kΩ Digital Rheostats

● Potentiometer Mode

● I2C and Manual Control Options

■ Extended Pattern Generator (EPG)

● Width Converter Option

● 8-bit Parallel Data Output

● Optional 1x 8-bit, 2x 4-bit, 4x 2-bit, or 8x 1-bit

Serial Bitstream Output

● 59 Bytes Pattern Stored in NVM

■ 11 Combination Function Macrocells

● Two 2-bit LUTs or DFF/LATCHs

● Four 3-bit LUTs or DFF/LATCHs with Reset/Set

● Four 3-bit LUTs, DFF/LATCHs, or Shift Registers