SLG46881V集成电路（IC）的CPLD（复杂可编程逻辑器件）规格书PDF中文资料

Key Features

 Two High Speed General Purpose Rail-to-Rail Analog

Comparators (ACMPxH)

 Two Low Power General Purpose Rail-to-Rail Analog

Comparators (ACMPxL)

 Two Voltage References

 Two Vref Outputs

 Twelve Combination Function Macrocells

 One Selectable DFF/LATCH or 2-bit LUT

 Four Selectable DFF/LATCHES or 3-bit LUTs

 One Selectable Pipe Delay or Ripple Counter, or 3-bit

LUT

 One Selectable Programmable Pattern Generator or

2-bit LUT

 Four Selectable 8-bit CNT/DLYs or 3-bit LUTs

 One Selectable 16-bit CNT/DLY or 4-bit LUT

 Asynchronous State Machine

 Twelve States

 Four Dynamic Memory Macrocells

 f(1) Computation Macrocell with Dedicated ACMP

 Serial Communications

 I2C Protocol Interface

 Programmable Delay with Edge Detector Output

 Deglitch Filter or Edge Detector

 Three Oscillators

 2.048 kHz Oscillator

 2.048 MHz Oscillator

 25 MHz Oscillator

 Crystal Oscillator

 Analog Temperature Sensor

 Power-On Reset

 Wide Range Power Supply

 2.5 V (±8 ) to 5 V (±10 ) VDD

 2.5 V (±8 ) to 5 V (±10 ) VDD2 (VDD2 ≤ VDD) for

SLG46880

 1 V (±5 ) to 1.8 V (±10) VDD2 for SLG46881

 Operating Temperature Range: -40 °C to 85 °C

 RoHS Compliant/Halogen-Free

 32-pin STQFN: 4 mm x 4 mm x 0.55 mm, 0.4 mm pitch

Applications

 Personal Computers and Servers

 PC Peripherals

 Consumer Electronics

 Data Communications Equipment

 Handheld and Portable Electronics

 Smartphones and Fitness Bands

 Notebook and Tablet PCs