SiT95316中文资料Quad PLL, 12-output Network Synchronizer数据手册SiTime规格书

描述 Description

The SiT95316 network synchronizer offers programmable quad fractional frequency translation with flexible input to output frequency translation options. The high performance DPLLs support up to 4 differential or 8 single-ended input clocks and provide 12 clock outputs. The clock outputs can be derived from any of the 4 PLLs in a fully flexible manner. This device is fully programmable with the I2C/SPI interface or an on-chip one time programmable (OTP) non-volatile memory for factory pre-programmed devices.

特性 Features

• Best-in-class 85 fs / 70 fs integrated jitter for quad PLL
• JESD204B/C support for data converter clocks
• 1 PPS input / output support with sub 20s best-in-class lock time
• Best-in-class hitless switching performance with <25 ps hit
• External EEPROM support and on-chip OTP
• Frequency DCO (0.001 ppt) and phase control DCOs (<1 ps resolution)
• Internal ZDB on all PLLs with < ±500 ps input to output delay across temp
• G.8273.2 / IEEE 1588 assisted holdover
• Independent VDDO (3.3 / 2.5 / 1.8 V)
• Fully flexible output and input mux

应用 Application

• Ethernet
• Optical Transport Network (OTN) Clocking for Framers, Mappers & Processors
• Microwave Backhaul
• 100G / 200G / 400G / 800G Ethernet
• Wireless Networks
• Small Cells
• Storage, Servers & Datacenters
• SONET/SDH Stratum 3
• Test & Measurement
• Broadcast Video