Pin-Controlled 1_710 MHz Jitter Cleaning Clock

Description The Si5317 is a flexible 1:1 jitter cleaning clock for high-performance applications that require jitter attenuation without clock multiplication. The Si5317 accepts a single clock input ranging from 1 to 710 MHz and generates two low jitter clock outputs at the same frequency. The cl

文件：341.39 Kbytes 页数：50 Pages

SILABS

芯科科技

PIN-CONTROLLED 1–711 MHZ JITTER CLEANING CLOCK

Features  Provides jitter attenuation for any clock frequency  One clock input / two clock outputs  Input/output frequency range: 1–711 MHz  Ultra low jitter: 300 fs (12 kHz–20 MHz) typical  Simple pin control interface  Selectable loop bandwidth for jitter attenuation: 60 Hz–8.4 k

文件：1.55391 Mbytes 页数：46 Pages

SKYWORKS

思佳讯

PIN-CONTROLLED 1–711 MHZ JITTER CLEANING CLOCK

Features  Provides jitter attenuation for any clock frequency  One clock input / two clock outputs  Input/output frequency range: 1–711 MHz  Ultra low jitter: 300 fs (12 kHz–20 MHz) typical  Simple pin control interface  Selectable loop bandwidth for jitter attenuation: 60 Hz–8.4 k

文件：1.55391 Mbytes 页数：46 Pages

SKYWORKS

思佳讯

Pin-Controlled 1_710 MHz Jitter Cleaning Clock

Description The Si5317 is a flexible 1:1 jitter cleaning clock for high-performance applications that require jitter attenuation without clock multiplication. The Si5317 accepts a single clock input ranging from 1 to 710 MHz and generates two low jitter clock outputs at the same frequency. The cl

文件：341.39 Kbytes 页数：50 Pages

SILABS

芯科科技

Si5317 EVALUATION BOARD

文件：825.08 Kbytes 页数：20 Pages

MuRata

村田

Jitter Attenuator Clock Multiplier

The Si5317B jitter attenuator combines third-generation DSPLL technology to enable any-frequency clock generation and jitter attenuation for applications requiring a high level of jitter performance. This device supports 1 input(s), 2 output(s) and has a maximum frequency output of 350 MHz. The Si53

Skyworks

思佳讯

Jitter Attenuator Clock Multiplier

The Si5317C jitter attenuator combines third-generation DSPLL technology to enable any-frequency clock generation and jitter attenuation for applications requiring a high level of jitter performance. This device supports 1 input(s), 2 output(s) and has a maximum frequency output of 200 MHz. The Si53

Skyworks

思佳讯

Package：36-VFQFN 裸露焊盘；包装：卷带（TR） 类别：集成电路（IC） 时钟发生器，PLL，频率合成器 描述：IC CLK JITTER CLEANR PROG 36QFN

SKYWORKS

思佳讯

Package：36-VFQFN 裸露焊盘；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 时钟发生器，PLL，频率合成器 描述：IC CLK JITTER CLEANR PROG 36QFN

SKYWORKS

思佳讯

Package：36-VFQFN 裸露焊盘；包装：托盘 类别：集成电路（IC） 时钟发生器，PLL，频率合成器 描述：IC CLK JITTER CLEANR PROG 36QFN

SKYWORKS

思佳讯