DB800ZL 8-OUTPUT PCIE GEN 3 BUFFER/ZERO DELAY BUFFER

Features  Eight 0.7 V low-power, push-pull, HCSL-compatible PCIe Gen 3 outputs  Individual OE HW pins for each output clock  100 MHz /133 MHz PLL operation, supports PCIe and QPI  SMBus address is 0xD8  PLL or bypass mode  Spread spectrum tolerable  1.05 to 3.3 V power supply v

文件：1.37514 Mbytes 页数：37 Pages

SKYWORKS

思佳讯

PRECISION CLOCK MULTIPLIER/REGENERATOR IC

Description The Si5310 is a fully integrated low-power clock multiplier and clock regenerator IC. The clock multiplier generates an output clock that is an integer multiple of the input clock. The clock regenerator operates simultaneously, creating a “clean” version of the input clock by using th

文件：516.64 Kbytes 页数：26 Pages

SILABS

芯科科技

PRECISION CLOCK MULTIPLIER/REGENERATOR IC

Description The Si5310 is a fully integrated low-power clock multiplier and clock regenerator IC. The clock multiplier generates an output clock that is an integer multiple of the input clock. The clock regenerator operates simultaneously, creating a “clean” version of the input clock by using th

文件：516.64 Kbytes 页数：26 Pages

SILABS

芯科科技

DB1200ZL 12-OUTPUT PCIE GEN 3 BUFFER

Features  Twelve 0.7 V low-power, pushpull, HCSL-compatible PCIe Gen 3 outputs  Individual OE HW pins for each output clock  100 MHz /133 MHz PLL operation, supports PCIe and QPI  PLL bandwidth SW SMBUS programming overrides the latch value from HW pin  9 selectable SMBUS addresse

文件：1.37237 Mbytes 页数：35 Pages

SKYWORKS

思佳讯

DB1200ZL 12-OUTPUT PCIE GEN 3 BUFFER

Features  Twelve 0.7 V low-power, pushpull, HCSL-compatible PCIe Gen 3 outputs  Individual OE HW pins for each output clock  100 MHz /133 MHz PLL operation, supports PCIe and QPI  PLL bandwidth SW SMBUS programming overrides the latch value from HW pin  9 selectable SMBUS addresse

文件：1.37237 Mbytes 页数：35 Pages

SKYWORKS

思佳讯

DB1200ZL 12-OUTPUT PCIE GEN 3 BUFFER

Features  Twelve 0.7 V low-power, pushpull, HCSL-compatible PCIe Gen 3 outputs  Individual OE HW pins for each output clock  100 MHz /133 MHz PLL operation, supports PCIe and QPI  PLL bandwidth SW SMBUS programming overrides the latch value from HW pin  9 selectable SMBUS addresse

文件：1.37237 Mbytes 页数：35 Pages

SKYWORKS

思佳讯

DB1200ZL 12-OUTPUT PCIE GEN 3 BUFFER

Features  Twelve 0.7 V low-power, pushpull, HCSL-compatible PCIe Gen 3 outputs  Individual OE HW pins for each output clock  100 MHz /133 MHz PLL operation, supports PCIe and QPI  PLL bandwidth SW SMBUS programming overrides the latch value from HW pin  9 selectable SMBUS addresse

文件：1.36942 Mbytes 页数：34 Pages

SKYWORKS

思佳讯

DB1200ZL 12-OUTPUT PCIE GEN 3 BUFFER

Features  Twelve 0.7 V low-power, pushpull, HCSL-compatible PCIe Gen 3 outputs  Individual OE HW pins for each output clock  100 MHz /133 MHz PLL operation, supports PCIe and QPI  PLL bandwidth SW SMBUS programming overrides the latch value from HW pin  9 selectable SMBUS addresse

文件：1.36942 Mbytes 页数：34 Pages

SKYWORKS

思佳讯

DB1200ZL 12-OUTPUT PCIE GEN 3 BUFFER

Features  Twelve 0.7 V low-power, pushpull, HCSL-compatible PCIe Gen 3 outputs  Individual OE HW pins for each output clock  100 MHz /133 MHz PLL operation, supports PCIe and QPI  PLL bandwidth SW SMBUS programming overrides the latch value from HW pin  9 selectable SMBUS addresse

文件：1.36942 Mbytes 页数：34 Pages

SKYWORKS

思佳讯

15-OUTPUT PCIE GEN3 BUFFER / ZERO-DELAY BUFFER

Features  Fifteen 0.7 V low-power, pushpull HCSL PCIe Gen3 outputs  100 MHz /133 MHz PLL operation, supports PCIe and QPI  PLL bandwidth SW SMBUS programming overrides the latch value from HW pin  9 selectable SMBUS addresses  SMBus address configurable to allow multiple buffers in

文件：1.93143 Mbytes 页数：33 Pages

SKYWORKS

思佳讯