SC28L194中文资料飞利浦数据手册PDF规格书

DESCRIPTION

The Philips 28L194 Quad UART is a single chip CMOS-LSI communications device that provides 4 full-duplex asynchronous channels with significantly deeper 16 byte FIFOs, Automatic in-band flow control using Xon/Xoff characters defined by the user and address recognition in the Wake-up mode. Synchronous bus interface is used for all communication between host and QUART. It is fabricated in Philips state of the art CMOS technology that combines the benefits of low cost, high density and low power consumption.

FEATURES

• Single 3.3V and 5.0V power supply

• Four Philips industry standard full duplex UART channels

• Sixteen byte receiver FIFOs for each UART

• Sixteen byte transmit FIFOs for each UART

• In band flow control using programmable Xon/Xoff characters

• Flow control using CTSN RTSN hardware handshaking

• Automatic address detection in multi-drop mode

• Three byte general purpose character recognition

• Fast data bus, 15 ns data bus release time, 125 ns bus cycle time

• Programmable interrupt priorities

• Automatic identification of highest priority interrupt pending

• Global interrupt and control registers ease setup and interrupt handling

• Vectored interrupts with programmable interrupt vector formats

– Interrupt vector modified with channel number

– Interrupt vector modified with channel number and channel type

– Interrupt vector not modified

• IACKN and DACKN signal pins

• Watch dog timer for each receiver (64 receive clock counts)

• Programmable Data Formats:

– 5 to 8 data bits plus parity

– Odd, even force or no parity

– 1, 1.5 or 2 stop bits

• Flexible baud rate selection for receivers and transmitters:

– 22 fixed rates; 50 - 230.4K baud or 100 to 460.8K baud

– Additional non-standard rates to 500K baud with internal generators

– Two reload-counters provide additional programmable baud rate generation

– External 1x or 16x clock inputs

– Simplified baud rate selection

• 1 MHz 1x and 16x data rates full duplex all channels.

• Parity, framing and overrun error detection

• False start bit detection

• Line break detection and generation

• Programmable channel mode

– Normal(full duplex)

– Diagnostic modes

automatic echo

local loop back

emote loop back

• Four I/O ports per UART for modem controls, clocks, RTSN, I/O, etc.

– All I/O ports equipped with “Change of State Detectors”

• Two global inputs and two global outputs for general purpose I/O

• Power down mode

• On chip crystal oscillator, 2-8 MHz

• TTL input levels. Outputs switch between full VCC and VSS

• High speed CMOS technology

• 80-pin Low Profile Quad Flat Pack LQFP and 68-pin PLCC

Uses

• Statistical Multiplexers

• Data Concentrators

– Packet-switching networks

– Process Control

– Building or Plant Control

– Laboratory data gathering

– ISDN front ends

– Computer Networks

– Point-of-Sale terminals

• Automotive, cab and engine controls

• Entertainment systems

– MIDDI keyboard control music systems

– Theater lighting control

• Terminal Servers

– Computer-Printer/Plotter links