SPI to IC-bus interface

General description The SC18IS600/601 is designed to serve as an interface between the standard SPI of a host (microcontroller, microprocessor, chip set, etc.) and the serial I2C-bus. This allows the host to communicate directly with other I2C-bus devices. The SC18IS600/601 can operate as an I2C-

文件：153.87 Kbytes 页数：28 Pages

PHI

飞利浦

SPI to I2C-bus interface

General description The SC18IS600 is designed to serve as an interface between the standard SPI of a host (microcontroller, microprocessor, chip set, etc.) and the serial I2C-bus. This allows the host to communicate directly with other I2C-bus devices. The SC18IS600 can operate as an I2C-bus mast

文件：173.9 Kbytes 页数：30 Pages

恩XP

SPI to I2C-bus interface

The SC18IS600 is designed to serve as an interface between the standard SPI of a host (microcontroller, microprocessor, chip set, etc.) and the serial I2C-bus. This allows the host to communicate directly with other I2C-bus devices. The SC18IS600 can operate as an I2C-bus master-transmitter or maste • SPI slave interface\n• SPI Mode 3\n• Single master I2C-bus controller\n• Four General Purpose Input/Output (GPIO) pins\n• Two quasi-bidirectional I/O pins\n• 5 V tolerant I/O pins\n• High-speed SPI: Up to 1.2 Mbit/s\n• High-speed I2C-bus: 400 kbit/s\n• 96-byte transmit buffer\n• 96-byte receive bu;

恩XP

SPI to IC-bus interface

General description The SC18IS600/601 is designed to serve as an interface between the standard SPI of a host (microcontroller, microprocessor, chip set, etc.) and the serial I2C-bus. This allows the host to communicate directly with other I2C-bus devices. The SC18IS600/601 can operate as an I2C-

文件：153.87 Kbytes 页数：28 Pages

PHI

飞利浦