S1K50000中文资料Standard Cells数据手册Epson规格书

特性 Features

• Large scale integration (0.35 µm CMOS, using 3-, or 4-layer interconnect process, number of raw gates: 1,450,000 Max)
• High-speed operation (Internal gate delay: 136ps/3.3V, 2-input power-NAND Typ.)
• Selectable power supply voltage: Using single power supply: (2.0 V, 2.5 V, 3.3 V)
• Using dual power supply: (I/O: 5.0 V, Internal: 3.3 V, I/O: 3.3 V, Internal: 2.5 V, I/O: 3.3 V, Internal: 2.0 V)
• Low power consumption (Internal cell: 0.22 µW/MHz/gate, 3.3V, Typ.)
• Drivability (IOL = 0.1, 1, 3, 8, 12, 24 mA at 5.0 V, IOL = 0.1, 1, 2, 6, 12 mA at 3.3 V, IOL = 0.1, 0.5, 1, 3, 6 mA at 2.5 V, IOL = 0.05, 0.3, 0.6, 2, 4 mA at 2.0 V)