RTL8201CP-LF中文资料ETC数据手册PDF规格书

[Realtek]

General Description

The RTL8201CP is a single-chip/single-port PHYceiver with an MII (Media Independent Interface)/SNI (Serial Network Interface). It implements all 10/100M Ethernet Physical-layer functions including the Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA), Twisted Pair Physical Medium Dependent Sublayer (TP-PMD), with an auto crossover detection function, 10Base-Tx Encoder/Decoder, and Twisted-Pair Media Access Unit (TPMAU).

A PECL (Pseudo Emitter Coupled Logic) interface is supported to connect with an external 100Base-FX fiber optical transceiver. The chip utilizes an advanced CMOS process to meet low voltage and low power requirements. With on-chip DSP (Digital Signal Processing) technology, the chip provides excellent performance under all operating conditions.

The RTL8201CP can be used for applications such as those for a Network Interface Adapter, MAU (Media Access Unit), CNR (Communication and Network Riser), ACR (Advanced Communication Riser), an Ethernet hub, and an Ethernet switch. In addition, it can be used in any embedded system with an Ethernet MAC that needs a UTP physical connection or Fiber PECL interface to an external 100Base-FX optical transceiver module.

特性 Features

The Realtek RTL8201CP is a Fast Ethernet PHYceiver with selectable MII or SNI interface to the MAC chip. It provides the following features:

■ Pin-to-pin compatible with the RTL8201BL

■ Supports MII and 7-wire SNI (Serial Network Interface)

■ 10/100Mbps operation

■ Full/half duplex operation

■ Twisted pair or fiber mode output

■ Auto-Negotiation

■ Supports power down mode

■ Supports operation under Link Down Power Saving mode

■ Supports Base Line Wander (BLW) compensation

■ Supports auto crossover detection (new RTL8201CP function)

■ Supports repeater mode

■ Adaptive Equalization

■ Network status LEDs

■ Flow control support

■ 25MHz crystal/oscillator as clock source

■ IEEE 802.3/802.3u compliant

■ Supports IEEE 802.3u clause 28; 1.8V operation with 3.3V IO signal tolerance

■ Low dual power supply, 1.8V and 3.3V; 1.8V is generated by an internal regulator

■ 0.18µm CMOS process

■ 48-pin LQFP package