RTL8110SB(L)数据手册Realtek中文资料规格书

描述 Description

This product is covered by one or more of the following patents:US5,307,459, US5,434,872, US5,732,094, US6,570,884, US6,115,776, and US6,327,625.
The Realtek RTL8110SB(L) LOM Gigabit Ethernet controllers (RTL8110SB (128 QFP) & RTL8110SBL (128 LQFP)) combine a triple-speed IEEE 802.3 compliant Media Access Controller (MAC) with a triple-speed Ethernet transceiver, 32-bit PCI bus controller, and embedded memory. With state-of-the-art DSP technology and mixed-mode signal technology, they offer high-speed transmission over CAT 5 UTP cable or CAT 3 UTP (10Mbps only) cable. Functions such as Crossover Detection & Auto-Correction, polarity correction, adaptive equalization, cross-talk cancellation, echo cancellation, timing recovery, and error correction are implemented to provide robust transmission and reception capability at high speeds.
The devices support the PCI v2.3 bus interface for host communications with power management and are compliant with the IEEE 802.3 specification for 10/100Mbps Ethernet and the IEEE 802.3ab specification for 1000Mbps Ethernet. They also support an auxiliary power auto-detect function, and will auto-configure related bits of the PCI power management registers in PCI configuration space.
They support the Advanced Configuration Power management Interface (ACPI)--power management for modern operating systems that are capable of Operating System-directed Power Management (OSPM)--to achieve the most efficient power management possible. PCI Message Signaled Interrupt (MSI) is also supported.
In addition to the ACPI feature, the RTL8110SB(L) support remote wake-up (including AMD Magic Packet, Re-LinkOk, and Microsoft® Wake-up frame) in both ACPI and APM (Advanced Power Management) environments. The LWAKE pin provides four different output signals including active high, active low, positive pulse, and negative pulse. The versatility of the LWAKE pin provides motherboards with Wake-On-LAN (WOL) functionality. To support WOL from a deep power down state (e.g. D3cold, i.e. main power is off and only auxiliary exists), the auxiliary power source must be able to provide the needed power for the RTL8110SB(L).
The RTL8110SB(L) is fully compliant with Microsoft® NDIS5 (IP, TCP, UDP) Checksum and Segmentation Task-offload features, and supports IEEE 802 IP Layer 2 priority encoding and 802.1Q Virtual bridged Local Area Network (VLAN). The above features contribute to lowering CPU utilization, especially benefiting performance when in operation on a network server. Also, the devices boost their PCI performance by supporting PCI Memory Read Line & Memory Read Multiple when transmitting, and Memory Write and Invalidate when receiving. To better qualify for server use, the RTL8110SB(L) support the PCI Dual Address Cycle (DAC) command when the assigned buffers reside at a physical memory address higher than 4 Gigabytes.

特性 Features

Integrated 10/100/1000 transceiver
Auto-Negotiation with Next Page capability
Supports PCI rev.2.3, 32-bit, 33/66MHz
Supports pair swap/polarity/skew correction
Crossover Detection & Auto-Correction
Wake-on-LAN and remote wake-up support
Microsoft® NDIS5 Checksum Offload (IP, TCP, UDP) and largesend offload support
Supports Full Duplex flow control (IEEE 802.3x)
Fully compliant with IEEE 802.3, IEEE 802.3u, IEEE 802.3ab
Supports IEEE 802.1P Layer 2 Priority Encoding
Supports IEEE 802.1Q VLAN tagging
Serial EEPROM
3.3V signaling, 5V PCI I/O tolerant
Transmit/Receive FIFO (8K/64K) support
Supports power down/link down power saving
Supports PCI Message Signaled Interrupt (MSI)
128-pin QFP package for RTL8110SB and 128-pin LQFP package for RTL8110SBL

应用 Application

Gigabit Ethernet on Motherboard