R9A06G037中文资料瑞萨数据手册PDF规格书

1.1 Features

⚫ High performance DSP

➢ Handles PLC PHY layer and other real time operations

➢ 276MHz maximum clock frequency

➢ 128KB of instruction RAM and 128KB of data RAM

➢ Dedicated instructions for Vitervi, read Solomon and others

⚫ MCU(ARM® Cortex™-M3)

➢ Handls PLC MAC layer and upper layer operation

➢ 138 MHz maximum clock frequency

➢ 512KB of RAM

➢ AES128 encryption and decryption hardware engine

➢ CRC hardware engine

⚫ 16KB of shared memory

⚫ Analog Front End circuit

➢ DAC

 12MHz, 12bit

➢ Tx filter

 3rd order filter

 150KHz for Cenelec and 600KHz for ARIB and FCC cutoff frequency

➢ Rx variable amplifier

 -18dB to +60dB dynamic range with 2dB step

 Auto Gain Control controlled by DSP

➢ ADC

 Delta – sigma type of ADC

 11bits ENOB

⚫ Programmable and Multiplexed General-Purpose Input/Output (GPIO) Pins

 UART(2ch), CSI(2ch), IIC, Serial-ROM-IF(Single/Dual/Quad), PWM(2ch) and GPIO(16)

⚫ Integrated regulator

 3.3V input and 1.1V output

⚫ Power Supply Voltage: 3.3V

⚫ PKG : 64-pin QFN, 9mm x 9mm, 0.5mm pitch

⚫ Operating Temperature

➢ -40 to +85℃