32-Bit MCU based on RISC-V

■ RISC-V Core ● Renesas RISC-V instruction-set architecture (RV32I [MACB]) ● Maximum operating frequency: 48 MHz ● Debug and Trace: RISC-V External Debug Support ● Debug Port: cJTAG ■ Memory ● 128-KB code flash memory ● 4 KB data flash ● 16 KB SRAM ● 128-bit unique ID

文件：1.57659 Mbytes 页数：72 Pages

RENESAS

瑞萨

32-Bit MCU based on RISC-V

■ RISC-V Core ● Renesas RISC-V instruction-set architecture (RV32I [MACB]) ● Maximum operating frequency: 48 MHz ● Debug and Trace: RISC-V External Debug Support ● Debug Port: cJTAG ■ Memory ● 128-KB code flash memory ● 4 KB data flash ● 16 KB SRAM ● 128-bit unique ID

文件：1.57659 Mbytes 页数：72 Pages

RENESAS

瑞萨

32-Bit MCU based on RISC-V

■ RISC-V Core ● Renesas RISC-V instruction-set architecture (RV32I [MACB]) ● Maximum operating frequency: 48 MHz ● Debug and Trace: RISC-V External Debug Support ● Debug Port: cJTAG ■ Memory ● 128-KB code flash memory ● 4 KB data flash ● 16 KB SRAM ● 128-bit unique ID

文件：1.57659 Mbytes 页数：72 Pages

RENESAS

瑞萨

32-Bit MCU based on RISC-V

■ RISC-V Core ● Renesas RISC-V instruction-set architecture (RV32I [MACB]) ● Maximum operating frequency: 48 MHz ● Debug and Trace: RISC-V External Debug Support ● Debug Port: cJTAG ■ Memory ● 128-KB code flash memory ● 4 KB data flash ● 16 KB SRAM ● 128-bit unique ID

文件：1.57659 Mbytes 页数：72 Pages

RENESAS

瑞萨