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R8A77211中文资料瑞萨数据手册PDF规格书

R8A77211
厂商型号

R8A77211

功能描述

Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

文件大小

9.07985 Mbytes

页面数量

1524

生产厂商 Renesas Technology Corp
企业简称

RENESAS瑞萨

中文名称

瑞萨科技有限公司官网

原厂标识
RENESAS
数据手册

下载地址一下载地址二到原厂下载

更新时间

2025-8-4 17:00:00

人工找货

R8A77211价格和库存,欢迎联系客服免费人工找货

R8A77211规格书详情

Overview

特性 Features

This LSI is a single-chip RISC microprocessor that integrates a 32-bit RISC-type Super H architecture CPU with a digital signal processing (DSP) extension as its core, together with a large-capacity 32-kbyte cache memory, a 16-kbyte X/Y memory, and an interrupt controller. High-speed data transfers can be performed by an on-chip direct memory access controller (DMAC), and an external memory access support function enables direct connection to different kinds of memory. This LSI also supports a stereo audio recording and playback function, a USB host controller, a function controller, an LCD controller, a PCMCIA interface, an A/D converter, and a D/A converter.

The USB host controller and LCD controller have bus master functions, so that data supplied from an external memory (area 3) can be freely processed. Since the USB host controller, in particular, conforms to Open HCI standards, it is extremely easy to transfer data from the PC of a device driver or other devices. Also, low-power operation suitable for battery operation is possible because the LCD controller continues to display even in sleep mode.

A powerful built-in power management function keeps power consumption low, even during high speed operation. This LSI is ideal for electronics devices, which require both high speed and low power consumption.

The SH7720 group integrates an SSL (Secure Socket Layer) accelerator that performs RSA (Rivest-Shamir-Adleman) operations and DES (Data Encryption Standard) and Triple-DES encryption/decryption, while the SH7721 group does not have the SSL accelerator. Each group consists of several models which includes or does not include an SD host interface (SDHI) to be suited to a variety of applications. See table 1.2 and 1.3, Product Lineup, for the models including (or not including) the SDHI.

SH7720/SH7721 Features

特性 Features

CPU

• Renesas Technology Original SuperH architecture

• Upper compatibility with SH-1, SH-2, and SH3-DSP at object code level

• 32-bit internal data bus

• General-register

 Sixteen 32-bit general registers (eight 32-bit shadow registers)

 Five 32-bit control registers

 Four 32-bit system registers

• RISC type instruction set

 Instruction length: 16-bit fixed length for improved code efficiency

 Load/store architecture

 Delayed branch instruction

 Instruction set based on C language

• Instruction execution time: One instruction/cycle for basic instructions

• Logical address space: 4 Gbytes

• Space identifier ASID: 8 bits, 256 logical address spaces

• Five-stage pipeline

DSP operating unit

• Mixture of 16-bit and 32-bit instructions

• 32-/40-bit internal data bus

• Multiplier, ALU, barrel shifter, and DSP register

• 16-bit x 16-bit → 32-bit one cycle multiplier

• Large-capacity DSP data register file

 Six 32-bit data registers

 Two 40-bit data registers

• Extended Harvard architecture for DSP data buses

 Two data buses

 One instruction bus

• Up to four parallel operations: ALU, multiply, two loads, and store

• Two address units to generating addresses for two memory access

• DSP data addressing modes: Increment, index register addition (with or without modulo addressing)

• Zero-overhead repeat loop control

• Conditional execution instructions

• User DSP mode and privileged DSP mode

Memory management unit (MMU)

• 4-Gbyte address space, 256 address spaces (8-bit ASID)

• Page unit sharing

• Supports multiple page sizes: 1 kbyte or 4 kbytes

• 128-entry, 4-way set associative TLB

• Specifies replacement way by software and supports random replacement algorithm

• Address assignment allows direct access to TLB contents

Cache memory

• 32-kbyte cache mixing instructions and data

• 512-entry, 4-way set associative, 16-byte block length

• Write-back, write-through, least recent used (LRU) replacement algorithm

• Single-stage write-back buffer (Continue...)

供应商 型号 品牌 批号 封装 库存 备注 价格
RENESASTECHN
23+
原厂封装
13528
振宏微原装正品,假一罚百
询价
RENESAS/瑞萨
24+
NA/
10
优势代理渠道,原装正品,可全系列订货开增值税票
询价
RENESAS
22+
BGA
3000
原装正品,支持实单
询价
RENESAS/瑞萨
2223+
BGA266
26800
只做原装正品假一赔十为客户做到零风险
询价
RENESAS/瑞萨
22+
BGA266
12245
现货,原厂原装假一罚十!
询价
RENESAS
24+
BGA
16900
原装正品现货支持实单
询价
RENESAS
BGA266
9850
一级代理 原装正品假一罚十价格优势长期供货
询价
RENESAS/瑞萨
24+
BGA266
43200
郑重承诺只做原装进口现货
询价
RenesasTechn
23+
417-BGA
65480
询价
RENESAS
21+
BGA266
12588
原装正品,自己库存 假一罚十
询价