32-bit MCU Renesas Advanced (RA) Family Renesas RA6 Series

■ Arm Cortex-M4 Core with Floating Point Unit (FPU)  Armv7E-M architecture with DSP instruction set  Maximum operating frequency: 120 MHz  Support for 4-GB address space  On-chip debugging system: JTAG, SWD, and ETM  Boundary scan and Arm Memory Protection Unit (Arm MPU) ■ Memory  512

文件：1.11353 Mbytes 页数：92 Pages

RENESAS

瑞萨

32-bit MCU Renesas Advanced (RA) Family Renesas RA6 Series

■ Arm Cortex-M4 Core with Floating Point Unit (FPU)  Armv7E-M architecture with DSP instruction set  Maximum operating frequency: 120 MHz  Support for 4-GB address space  On-chip debugging system: JTAG, SWD, and ETM  Boundary scan and Arm Memory Protection Unit (Arm MPU) ■ Memory  512

文件：1.11353 Mbytes 页数：92 Pages

RENESAS

瑞萨

Armv7E-M architecture with DSP instruction set Maximum operating frequency: 120 MHz

文件：1.27053 Mbytes 页数：92 Pages

RENESAS

瑞萨

32-bit MCU Renesas Advanced (RA) Family Renesas RA6 Series

■ Arm Cortex-M4 Core with Floating Point Unit (FPU)  Armv7E-M architecture with DSP instruction set  Maximum operating frequency: 120 MHz  Support for 4-GB address space  On-chip debugging system: JTAG, SWD, and ETM  Boundary scan and Arm Memory Protection Unit (Arm MPU) ■ Memory  512

文件：1.11353 Mbytes 页数：92 Pages

RENESAS

瑞萨

Armv7E-M architecture with DSP instruction set Maximum operating frequency: 120 MHz

文件：1.27053 Mbytes 页数：92 Pages

RENESAS

瑞萨

32-bit MCU Renesas Advanced (RA) Family Renesas RA6 Series

■ Arm Cortex-M4 Core with Floating Point Unit (FPU)  Armv7E-M architecture with DSP instruction set  Maximum operating frequency: 120 MHz  Support for 4-GB address space  On-chip debugging system: JTAG, SWD, and ETM  Boundary scan and Arm Memory Protection Unit (Arm MPU) ■ Memory  512

文件：1.11353 Mbytes 页数：92 Pages

RENESAS

瑞萨