R5F523E6ADNF中文资料瑞萨数据手册PDF规格书

■ 32-bit RXv2 CPU core

 Max. operating frequency: 32 MHz

Capable of 64 DMIPS in operation at 32 MHz

 Enhanced DSP: 32-bit multiply-accumulate and 16-bit multiplysubtract

instructions supported

 Built-in FPU: 32-bit single-precision floating point (compliant to

IEEE754)

 Divider (fastest instruction execution takes two CPU clock cycles)

 Fast interrupt

 CISC Harvard architecture with 5-stage pipeline

 Variable-length instructions, ultra-compact code

 On-chip debugging circuit

 Memory protection unit (MPU) supported

■ Low power design and architecture

 Operation from a single 1.8-V to 5.5-V supply

 Three low power consumption modes

 Low power timer (LPT) that operates during the software standby state

■ On-chip flash memory for code

 Read cycle of 31.25 ns in 32-MHz operation

 No waiting time when the CPU is reading at full speed

 128-Kbyte to 256-Kbyte capacities

 On-board or off-board user programming

 Programmable at 1.8 V

 For instructions and operands

■ On-chip data flash memory

 8 Kbytes (1,000,000 program/erase cycles (typ.))

 BGO (Background Operation)

■ On-chip SRAM, no wait states

 16- to 32-Kbyte size capacities

■ Data transfer functions

 DMAC: Incorporates four channels

 DTC: Four transfer modes

■ ELC

 Module operation can be initiated by event signals without using

interrupts.

 Linked operation between modules is possible while the CPU is

sleeping.

■ Reset and supply management

 Seven types of reset, including the power-on reset (POR)

 Low voltage detection (LVD) with voltage settings

■ Clock functions

 Main clock oscillator frequency: 1 MHz to 20 MHz

 External clock input frequency: Up to 20 MHz

 PLL circuit input: 4 MHz to 8 MHz

 On-chip low- and high-speed oscillators, dedicated on-chip low-speed

oscillator for the IWDT

 Clock frequency accuracy measurement circuit (CAC)

■ Independent watchdog timer

 15-kHz on-chip oscillator produces a dedicated clock signal to drive

IWDT operation.

■ Useful functions for IEC60730 compliance

 Self-diagnostic and disconnect detection assistance functions for the A/

D converter, clock frequency accuracy measurement circuit,

independent watchdog timer, RAM test assistance functions using the

DOC, etc.

■ MPC

 Input/output functions selectable from multiple pins

■ Up to eight communication functions

 CAN (one channel) compliant to ISO11898-1:

Transfer at up to 1 Mbps

 SCI with many useful functions (up to four channels),

asynchronous mode, clock synchronous mode, smart card interface,

reduction of errors in communications using the bit rate modulation

function

 I2C bus interface: Transfer at up to 400 kbps, capable of SMBus

operation (one channel)

 RSPI (one channel): Transfer at up to 16 Mbps