NPN/NPN resistor-equipped transistors; R1 = 4.7 k廓, R2 = 10 k廓

General description NPN/NPN double Resistor-Equipped Transistors (RET) in Surface-Mounted Device (SMD) plastic packages. Features and benefits ■ 100 mA output current capability ■ Built-in bias resistors ■ Simplifies circuit design ■ Reduces component count ■ Reduces pick and place costs ■

文件：109.7 Kbytes 页数：9 Pages

恩XP

丝印：H5；Package：TSSOP6；50 V, 100 mA NPN/NPN resistor-equipped double transistor; R1 = 4.7 kΩ, R2 = 10 kΩ

1. General description NPN/NPN double Resistor-Equipped Transistor (RET) in a very small SOT363 (SC-88) Surface- Mounted Device (SMD) plastic package. NPN/PNP complement: PUMD18 PNP/PNP complement: PUMB18 2. Features and benefits • 100 mA output current capability • Built-in bias resistor

文件：237.76 Kbytes 页数：11 Pages

NEXPERIA

安世

PNP/PNP resistor-equipped transistors; R1 = 4.7 k, R2 = 10 k

Features and benefits  100 mA output current capability  Built-in bias resistors  Simplifies circuit design  Reduces component count  Reduces pick and place costs  AEC-Q101 qualified

文件：723.97 Kbytes 页数：15 Pages

NEXPERIA

安世

Low VCEsat (BISS) transistors

文件：948.33 Kbytes 页数：12 Pages

PHI

飞利浦

NPN/NPN resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 10 kΩ

General description\nNPN/NPN double Resistor-Equipped Transistors (RET) in Surface-Mounted Device (SMD) plastic packages.Features and benefits\n■ 100 mA output current capability\n■ Built-in bias resistors\n■ Simplifies circuit design\n■ Reduces component count\n■ Reduces pick and place costs\n■ AEC

恩XP

NPN/NPN resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 10 kΩ

NPN/NPN double Resistor-Equipped Transistors (RET) in Surface-Mounted Device (SMD) plastic packages. • 100 mA output current capability\n• Built-in bias resistors\n• Simplifies circuit design\n• Reduces component count\n• Reduces pick and place costs\n• AEC-Q101 qualified;

Nexperia

安世