PTN5100DABS数据手册恩XP中文资料规格书

描述 Description

PTN5100D is a single port USB Type-C Power Delivery (PD) PHY and Protocol IC thatprovides Type-C Configuration channel interface and USB PD Physical and Protocol layerfunctions to a System PD Port Policy Controller (Policy Engine and Device PolicyManager, Alternate mode controller). It complies with USB PD and Type-C specifications.PTN5100D is architected to deliver robust performance, compliant behavior,configurability and system implementation flexibility that are essential to tide overinteroperability and compliance hurdles in the platform applications.
PTN5100D can support system realization of the following PD roles: (i) Consumer only (ii)Consumer/Provider. Further, it is register programmed to operate in Type-C specificUpstream Facing Port (UFP). It can work along with the PD policy controller to operatein other modes (DFP, DRP).
PTN5100D operates from platform power supply VDD, or it can also be poweredfrom USB power VBUS directly. The host interface operates on VIO supply tofacilitate interfacing to systems that use IO supply rail different from VDDsupply rail.
It provides SPI/I²C interface for system host control/status update. Theinterface choice is pre- configured in NXP factory.
PTN5100D is available in a small footprint package option: HVQFN20 4 mm x 4 mm, 0.5 mmpitch.

特性 Features

USB PD and Type-C FeaturesComplies with USB PD and USB Type-C specifications.
Supports implementation of various system PD roles: Consumer,Consumer/Provider
Supports Type-C role configurabilityType-C role (UFP, DFP)
Implements UFP role pull down behavior to handle dead batterycondition on battery powered platforms
Implements 'Rd' indication on CC pin
Cooperatively works under the control of Policy controller MCU for power deliverynegotiation and contract(s), Alternate mode and VDM exchangesImplements BMC (de)coding, 4B5B symbol (de)coding, CRCgeneration/checking, PD packet assembling/disassembling includingPreamble, SOP, EOP, Good CRC response, Retries, Hard and Cableresets
PD PHY and Protocol layer interface control and status update handledvia SPI/I²C interface
DRP and DFP roles can be supported
System protection featuresBack current protection on all pins when PTN5100D is unpowered
CC1 and CC2 pins are 5.5 V tolerant
VBUS pin and VBUS power path MOSFET enable pins are 28 V tolerant
GeneralDelivers (active LOW enable) gate control signals for PMOS Power MOSFETs onVBUS source and sink power paths
Provides dedicated IO pin (CC_ORIENT) for indicating Cable/plug orientation
Delivers up to 30 mA (max) for powering Policy controller MCU
Supports SPI slave interface (SPI modes 0 and 3 supported) up to 30 MHz
Supports I²C slave interface standard mode (100 kHz), Fast mode (400kHz) and Fast mode plus (1 MHz)
Supports 3.3 V or 1.8 V capable I²C-bus or SPI interfaceSupports register access - device configuration, control andstatus/interrupt interfacing through Slave I²C-businterface
Power supplies - VDD (3.3 V ±10 %) or VBUSTolerant up to 28 V on VBUS and operational up to maximumof 25 V on VBUS
Operating temperature -20 °C to 105 °C
ESD 8 kV HBM, 1 kV CDM
Package: HVQFN20 4 mm x 4 mm, 0.5 mm pitch.

应用 Application

PC accessories/peripherals: Docking, Mobile Monitors, Multi-Function Monitors,Portable/External hard drives, Dongles and accessories, etc.