PTN3460IBS中文资料eDP to LVDS bridge for industrial and embedded applications数据手册恩XP规格书

描述 Description

PTN3460 is an (embedded) DisplayPort to LVDS bridge device that enables connectivitybetween an (embedded) DisplayPort (eDP) source and LVDS display panel. It processesthe incoming DisplayPort (DP) stream, performs DP to LVDS protocol conversion andtransmits processed stream in LVDS format.
PTN3460 has two high-speed ports: Receive port facing DP Source (for example,CPU/GPU/chip set), Transmit port facing the LVDS receiver (for example, LVDS displaypanel controller). The PTN3460 can receive DP stream at link rate 1.62 Gbit/s or2.7 Gbit/s and it can support 1-lane or 2-lane DP operation. It interacts with DP source viaDP Auxiliary (AUX) channel transactions for DP link training and setup.
It supports single bus or dual bus LVDS signaling with color depths of 18 bits per pixel or24 bits per pixel and pixel clock frequency up to 112 MHz. The LVDS data packing can bedone either in VESA or JEIDA format. Also, the DP AUX interface transportsI²C-over-AUX commands and support EDID-DDC communication with LVDS panel. Tosupport panels without EDID ROM, the PTN3460 can emulate EDID ROM behavioravoiding specific changes in system video BIOS.
PTN3460 provides high flexibility to optimally fit under different platform environments. Itsupports three configuration options: multi-level configuration pins, DP AUX interface, andI²C-bus interface.
PTN3460 can be powered by either 3.3 V supply only or dual supplies (3.3 V / 1.8 V) and isavailable in the HVQFN56 7 mm x 7 mm package with 0.4 mm pitch.

特性 Features

Device features
• Embedded microcontroller and on-chip Non-Volatile Memory (NVM) allow for flexibility in firmware updates
• LVDS panel power-up (/down) sequencing control
• Firmware controlled panel power-up (/down) sequence timing parameters
• No external timing reference needed
• EDID ROM emulation to support panels with no EDID ROM. Emulation ON/OFF is set via configuration pin CFG4
• Supports EDID structure v1.3
• On-chip EDID emulation up to seven different EDID data structures
• eDP complying PWM signal generation or PWM signal pass through from eDP source