型号 | 下载 订购 | 功能描述 | 制造商 上传企业 | LOGO |
---|---|---|---|---|
丝印:PP;Package:SMB;600 Watt Peak Power Zener Transient Voltage Suppressors The SMB series is designed to protect voltage sensitive components from high voltage, high energy transients. They have excellent clamping capability, high surge capability, low zener impedance and fast response time. The SMB series is supplied in ON Semiconductor’s exclusive, cost-e 文件:69.48 Kbytes 页数:7 Pages | ONSEMI 安森美半导体 | ONSEMI | ||
丝印:PP;Package:DO-214AC;5.0 To 200V 600W Surface Mount Transient Voltage Suppressors (TVS) Glass passivated chip 600W peak pulse power capability with a 10/1000us waveform Repetitive rate (duty cycle):0.01 Typical IR less than 1μA above 10V Excellent clamping capability Very fast response time High temperature soldering: 260°C/10s at terminals. RoHS compliant Features 文件:3.35089 Mbytes 页数:6 Pages | UNSEMI 优恩半导体 | UNSEMI | ||
丝印:pP;Package:SOT886;Low-power D-type flip-flop; positive-edge trigger 1. General description The 74AUP1G79 is a single positive-edge triggered D-type flip-flop. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output.. Schmitt-trigger action at all inputs m 文件:305.22 Kbytes 页数:21 Pages | NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司 | NEXPERIA | ||
丝印:pP;Package:SOT1115;Low-power D-type flip-flop; positive-edge trigger 1. General description The 74AUP1G79 is a single positive-edge triggered D-type flip-flop. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output.. Schmitt-trigger action at all inputs m 文件:305.22 Kbytes 页数:21 Pages | NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司 | NEXPERIA | ||
丝印:pP;Package:SOT1202;Low-power D-type flip-flop; positive-edge trigger 1. General description The 74AUP1G79 is a single positive-edge triggered D-type flip-flop. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output.. Schmitt-trigger action at all inputs m 文件:305.22 Kbytes 页数:21 Pages | NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司 | NEXPERIA | ||
丝印:pP;Package:SOT353-1;Low-power D-type flip-flop; positive-edge trigger 1. General description The 74AUP1G79 is a single positive-edge triggered D-type flip-flop. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output.. Schmitt-trigger action at all inputs m 文件:305.22 Kbytes 页数:21 Pages | NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司 | NEXPERIA | ||
丝印:pP;Package:SOT1226-3;Low-power D-type flip-flop; positive-edge trigger 1. General description The 74AUP1G79 is a single positive-edge triggered D-type flip-flop. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output.. Schmitt-trigger action at all inputs m 文件:305.22 Kbytes 页数:21 Pages | NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司 | NEXPERIA | ||
丝印:pP;Package:SOT1116;Low-power dual D-type flip-flop; positive-edge trigger 1. General description The 74AUP2G79 provides the dual positive-edge triggered D-type flip-flop. Information on the data input (nD) is transferred to the nQ output on the LOW-to-HIGH transition of the clock pulse (nCP). The nD input must be stable one set-up time prior to the LOW-to-HIGH clock 文件:279.06 Kbytes 页数:19 Pages | NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司 | NEXPERIA | ||
丝印:pP;Package:SOT1203;Low-power dual D-type flip-flop; positive-edge trigger 1. General description The 74AUP2G79 provides the dual positive-edge triggered D-type flip-flop. Information on the data input (nD) is transferred to the nQ output on the LOW-to-HIGH transition of the clock pulse (nCP). The nD input must be stable one set-up time prior to the LOW-to-HIGH clock 文件:279.06 Kbytes 页数:19 Pages | NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司 | NEXPERIA | ||
丝印:PP;WE-TVSP Power TVS Diode General Information: It is recommended that the temperature of the component does not exceed +150°C under worst case conditions Operating Temperature -65 up to +150 °C Storage Conditions (in original packaging) 文件:658.67 Kbytes 页数:8 Pages | WURTHWurth Elektronik GmbH & Co. KG, Germany. 伍尔特伍尔特集团 | WURTH |
详细参数
- 型号:
PP
- 功能描述:
TVS 二极管 - 瞬态电压抑制器 160volts 5uA 2.3 Amps Uni-Dir
- RoHS:
否
- 制造商:
Vishay Semiconductors
- 极性:
Bidirectional
- 击穿电压:
58.9 V
- 钳位电压:
77.4 V
- 峰值浪涌电流:
38.8 A
- 封装/箱体:
DO-214AB
- 最小工作温度:
- 55 C
- 最大工作温度:
+ 150 C
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
VISHAY |
19+ |
SMB |
45000 |
询价 | |||
FAIRCHILD/仙童 |
25+ |
DO-214AA |
154475 |
明嘉莱只做原装正品现货 |
询价 | ||
SUNMATE(森美特) |
2019+ROHS |
DO-214AA(SMB) |
66688 |
森美特高品质产品原装正品免费送样 |
询价 | ||
EIC |
23+ |
SMB |
56000 |
询价 | |||
BRIGHTKING/君耀 |
2019+PB |
SMBDO-214AA |
45000 |
原装正品 可含税交易 |
询价 | ||
LITTELFUSE/力特 |
2021+ |
SMB |
9000 |
原装现货,随时欢迎询价 |
询价 | ||
JINGDAO/晶导微 |
24+ |
SMB |
20000 |
十年沉淀唯有原装 |
询价 | ||
VISAHA/GeneralSemiconduc |
24+ |
DO-214 |
9000 |
新进库存/原装 |
询价 | ||
FSC |
2016+ |
DO-214 |
6000 |
只做原装,假一罚十,公司可开17%增值税发票! |
询价 | ||
CCD |
13+ |
6258 |
原装分销 |
询价 |
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