PN5180A0HN中文资料数据手册PDF规格书

2. General description

PN5180, the best full NFC frontend of the market.

As a highly integrated high-power output NFC frontend IC for contactless communication

at 13.56 MHz, this frontend IC utilizes an outstanding modulation and demodulation

concept completely integrated for different kinds of contactless communication methods

and protocols.

The PN5180 ensures maximum interoperability for next generation of NFC enabled

mobile phones. The PN5180 is optimized for point of sales terminal applications and

implements a high-power NFC frontend functionality which allows to achieve EMV

compliance on RF level without additional external active components.

The PN5180 frontend IC supports the following operating modes:

• Reader/Writer mode supporting ISO/IEC 14443-A up to 848 kBit/s, MIFARE

• Reader/Writer mode supporting ISO/IEC 14443-B up to 848 kBit/s

• Reader/Writer mode supporting JIS X 6319-4 (comparable with FeliCa scheme)

• Read/write mode supporting ISO/IEC 15693

• Read/write mode supporting ISO/IEC 18000-3 Mode 3

• ISO/IEC18092 (NFC-IP1)

• ISO/IEC21481 (NFC-IP-2)

• NFC-FORUM

• ISO14443-type A Card emulation up to 848 kBit/s

Enabled in Reader/Writer mode for ISO/IEC 14443-A, MIFARE the PN5180’s internal

transmitter part is able to drive a reader/writer antenna designed to communicate with

ISO/IEC 14443A, MIFARE cards and transponders without additional active circuitry. The

receiver part provides a robust and efficient implementation of a demodulation and

decoding circuitry for signals from ISO/IEC 14443-A, MIFARE compatible cards and

transponders. The digital part handles the complete ISO/IEC 14443-A, MIFARE framing

and error detection (Parity and CRC).

The PN5180 supports all layers of the ISO/IEC 14443-B reader/writer communication

scheme, given correct implementation of additional components, like oscillator, power

supply, coil etc. and provided that standardized protocols, e.g. like ISO/IEC 14443-4

and/or ISO/IEC 14443-B anticollision are correctly implemented by a host microcontroller.

Enabled in Reader/Writer mode for JIS X 6319-4, the PN5180 NFC frontend IC supports

the FeliCa communication scheme. The receiver part provides a robust and efficient

implementation of the demodulation and decoding circuitry for JIS X 6319-4 coded

signals. The digital part handles the FeliCa framing and error detection like CRC. The

PN5180 supports JIS X 6319-4 contactless reader/writer communication using higher

transfer speeds up to 424 kbit/s in both directions.

The PN5180 supports the vicinity protocol according to ISO/IEC 15693 and

ISO/IEC 18000-3 mode 3.

The PN5180 frontend IC supports the ISO/IEC18092 modes reader, P2P (NFC-IP1 and

NFC-IP2) and type A card emulation.

In Card Operation mode, the PN5180 frontend IC is able to answer to a reader/writer

command according to the ISO/IEC 14443A/MIFARE card interface scheme. The Card

Operation Mode allows the PN5180 to act like an NFC Forum tag if this functionality is

supported by the host firmware.

One SPI-based host controller interface is implemented:

• Serial Peripheral Interface (SPI) with data rates up to 7 Mbit/s with MOSI, MISO, NSS

and SCK signals

• Interrupt request line to inform host controller on events

• EEPROM configurable pull-up resistor on SPI MISO line

• Busy line to indicate to host availability of data for reading

3. Features and benefits

 Transmitter current up to 250 mA

 Dynamic Power Control controls antenna current, RF power, and the related

waveforms to deliver optimized RF performance even under detuned conditions. It

maximizes transmitter current during detuned conditions and thereby compensates for

any negative effects generated by nearby metal, cards, or phones. The DPC ensures

robust communication with smartcards and smartphones, without using any additional

external components.

 Includes NXP ISO/IEC14443-A, Innovatron ISO/IEC14443-B and NXP MIFARE

Crypto 1 intellectual property licensing rights

 Full compliance with all standards relevant to NFC, contactless operation and EMVCo

 Automatic EMD handling for faster design of payment terminals

 Onboard Dynamic Power Control (DPC) for optimized RF performance, even under

detuned conditions

 Low-power card detection minimizes current consumption during polling

 Active load modulation supports smaller antenna with Card Emulation Mode

 Small, industry-standard packages

 NFC Cockpit GUI: software-independent register settings

 Development kit with 32-bit NXP LPC1769 MCU and antenna

 NFC Reader Library with source code ready for EMVCo L1 and

NFC Forum compliance

4. Applications

 Payment terminals

 Physical-access readers

 eGov readers

 Industrial readers

 High-performance readers

The NXP PN5180 NFC frontend, equipped with unique features that improve

performance, save energy, and maximize efficiency, enables best-in-class readers that

conform to the requirements for EMVCo and NFC Forum specifications, for the broadest

possible interoperability.