3.3-V DUAL PLL MULTICLOCK GENERATOR

FEATURES 27-MHz Master Clock Input Generated Audio System Clock (PLL1707): – SCKO0: 768 fS (fS = 44.1 kHz) – SCKO1: 768 fS, 512 fS (fS = 48 kHz) – SCKO2: 256 fS (fS = 32, 44.1, 48, 64, 88.2, 96 kHz) – SCKO3: 384 fS (fS = 32, 44.1, 48, 64, 88.2, 96 kHz) Generated Audio System Clock (PLL170

文件：365.33 Kbytes 页数：25 Pages

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德州仪器

3.3-V DUAL-PLL MULTICLOCK GENERATOR

1FEATURES • Qualified for Automotive Applications • 27-MHz Master Clock Input • Generated Audio System Clock – SCKO0: 768 fS (fS = 44.1 kHz) – SCKO1: 768 fS, 512 fS (fS = 48 kHz) – SCKO2: 256 fS (fS = 32, 44.1, 48, 64, 88.2, 96 kHz) – SCKO3: 384 f S (fS = 32, 44.1, 48, 64, 88.2, 96 kHz)

文件：830.92 Kbytes 页数：18 Pages

TI

德州仪器

3.3-V DUAL-PLL MULTICLOCK GENERATOR

文件：602.6 Kbytes 页数：18 Pages

TI

德州仪器

汽车类 3.3V 双路 PLL 多时钟发生器

The PLL1707 is a low-cost phase-locked loop (PLL) multiclock generator. The PLL1707 can generate four system clocks from a 27-MHz reference input frequency. The clock outputs of the PLL1707 can be controlled by sampling frequency-control pins. The device gives customers both cost and space savings b • Qualified for Automotive Applications\n• Generated Audio System Clock \n• SCKO1: 768 fS, 512 fS (fS = 48 kHz)\n• SCKO3: 384 fS (fS = 32, 44.1, 48, 64, 88.2, 96 kHz)\n• Low Clock Jitter: 50 ps (Typical)\n• 3.3-V Single Power Supply\n• Package: 20-Pin SSOP (150 mil), Lead-Free Product\n• DVD Recorde;

TI

德州仪器