PL520-80数据手册集成电路（IC）的时钟发生器PLL频率合成器规格书PDF

描述 Description

The PL520-80 is a VCXO IC specifically designed to work with fundamental crystals between 19MHz and 65MHz. The selectable divide by two feature extends the operation range from 9.5MHz to 65MHz.It requires very low current into the crystal resulting in better overall stability. The OE logic feature allows selection of enable high or enable low. Furthermore, it provides selectable CMOS, PECL or LVDS outputs.

Please consider this devicePL560-48

特性 Features

• 19MHz to 65MHz fundamental crystal input
• Output range 9.5MHz – 65MHz
• Complementary outputs: PECL or LVDS output
• Selectable OE Logic (enable high or enable low)
• Available outputs: PECL, LVDS, or CMOS (High Drive (30mA) or Standard Drive (10mA) output)
• Integrated variable capacitors
• Supports 2.5V or 3.3V Power Supply
• Available in Die form

简介

PL520-80属于集成电路（IC）的时钟发生器PLL频率合成器。由制造生产的PL520-80时钟发生器，PLL，频率合成器时钟发生器、PLL 和频率合成器集成电路 (IC) 可为逻辑器件提供参考信号的稳定定时脉冲，这些器件包括计算机、微控制器、数据通信系统和图形/视频发生器。这些集成电路可能包括缓冲器、驱动器、分频器、倍频器、多路复用器、合成器、扇出分配器和预分频器。